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authorGabor Greif <ggreif@gmail.com>2013-04-07 21:36:11 +0200
committerGabor Greif <ggreif@gmail.com>2013-04-07 22:34:26 +0200
commit8e02c0a594c6e5dc4208d8247a78bd4ce2d423e5 (patch)
tree94df4605ff621a7ef2118d9a6cdd61571647b412
parenta7b08c05a883c350d017ebc9de5bb70b818bcb6a (diff)
downloadhaskell-8e02c0a594c6e5dc4208d8247a78bd4ce2d423e5.tar.gz
Fix typos
-rw-r--r--compiler/nativeGen/RegAlloc/Liveness.hs6
-rw-r--r--compiler/nativeGen/SPARC/CodeGen.hs4
-rw-r--r--compiler/nativeGen/SPARC/CodeGen/Gen64.hs2
3 files changed, 6 insertions, 6 deletions
diff --git a/compiler/nativeGen/RegAlloc/Liveness.hs b/compiler/nativeGen/RegAlloc/Liveness.hs
index f49155e827..41efa18753 100644
--- a/compiler/nativeGen/RegAlloc/Liveness.hs
+++ b/compiler/nativeGen/RegAlloc/Liveness.hs
@@ -2,7 +2,7 @@
--
-- The register liveness determinator
--
--- (c) The University of Glasgow 2004
+-- (c) The University of Glasgow 2004-2013
--
-----------------------------------------------------------------------------
module RegAlloc.Liveness (
@@ -423,7 +423,7 @@ slurpReloadCoalesce live
, slotMap' <- addToUFM slotMap slot reg
= return (slotMap', Nothing)
- -- add an edge betwen the this reg and the last one stored into the slot
+ -- add an edge between the this reg and the last one stored into the slot
| LiveInstr (RELOAD slot reg) _ <- li
= case lookupUFM slotMap slot of
Just reg2
@@ -594,7 +594,7 @@ patchEraseLive patchF cmm
-- source and destination regs are the same
| r1 == r2 = True
- -- desination reg is never used
+ -- destination reg is never used
| elementOfUniqSet r2 (liveBorn live)
, elementOfUniqSet r2 (liveDieRead live) || elementOfUniqSet r2 (liveDieWrite live)
= True
diff --git a/compiler/nativeGen/SPARC/CodeGen.hs b/compiler/nativeGen/SPARC/CodeGen.hs
index c6497e1248..30ffcd9d9a 100644
--- a/compiler/nativeGen/SPARC/CodeGen.hs
+++ b/compiler/nativeGen/SPARC/CodeGen.hs
@@ -2,7 +2,7 @@
--
-- Generating machine code (instruction selection)
--
--- (c) The University of Glasgow 1996-2004
+-- (c) The University of Glasgow 1996-2013
--
-----------------------------------------------------------------------------
@@ -538,7 +538,7 @@ move_final (v:vs) (a:az) offset
-- | Assign results returned from the call into their
--- desination regs.
+-- destination regs.
--
assign_code :: Platform -> [LocalReg] -> OrdList Instr
diff --git a/compiler/nativeGen/SPARC/CodeGen/Gen64.hs b/compiler/nativeGen/SPARC/CodeGen/Gen64.hs
index 7b39a371d7..a7532e1c8d 100644
--- a/compiler/nativeGen/SPARC/CodeGen/Gen64.hs
+++ b/compiler/nativeGen/SPARC/CodeGen/Gen64.hs
@@ -36,7 +36,7 @@ import Outputable
-- | Code to assign a 64 bit value to memory.
assignMem_I64Code
- :: CmmExpr -- ^ expr producing the desination address
+ :: CmmExpr -- ^ expr producing the destination address
-> CmmExpr -- ^ expr producing the source value.
-> NatM InstrBlock