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| author | Peter Trommler <ptrommler@acm.org> | 2019-02-24 17:11:00 +0100 |
|---|---|---|
| committer | Peter Trommler <ptrommler@acm.org> | 2019-02-24 17:11:00 +0100 |
| commit | eafa6ab26a06bfc006b048021a7611d54a2ef7d8 (patch) | |
| tree | c5537a5bc5987240de89b9db8910969540dd1dba | |
| parent | 6ba3421efd1caf469e30ce53fef8c5406adde357 (diff) | |
| download | haskell-eafa6ab26a06bfc006b048021a7611d54a2ef7d8.tar.gz | |
RTS: Add missing memory barrier
| -rw-r--r-- | rts/WSDeque.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/rts/WSDeque.c b/rts/WSDeque.c index b9393b1839..9502df05d4 100644 --- a/rts/WSDeque.c +++ b/rts/WSDeque.c @@ -195,7 +195,9 @@ stealWSDeque_ (WSDeque *q) if ((long)b - (long)t <= 0 ) { return NULL; /* already looks empty, abort */ } - + // NB. these loads must be ordered so writes from pushWSDeque + // will be seen. + load_load_barrier(); /* now access array, see pushBottom() */ stolen = q->elements[t & q->moduloSize]; |