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| author | nineonine <mail4chemik@gmail.com> | 2022-02-17 00:01:44 -0800 |
|---|---|---|
| committer | Marge Bot <ben+marge-bot@smart-cactus.org> | 2022-02-24 20:25:42 -0500 |
| commit | 70bafefbfc5fc31d5fad3184fc9bdc623871923b (patch) | |
| tree | 05110e264743ef4fe0d3ff4347ccf32e0c6e9584 | |
| parent | d0deaaf4241fa236bd8d87abde68a0ad41a7e119 (diff) | |
| download | haskell-70bafefbfc5fc31d5fad3184fc9bdc623871923b.tar.gz | |
ghci: show helpful error message when loading module with SIMD vector operations (#20214)
Previously, when trying to load module with SIMD vector operations, ghci would panic
in 'GHC.StgToByteCode.findPushSeq'. Now, a more helpful message is displayed.
| -rw-r--r-- | compiler/GHC/StgToByteCode.hs | 3 | ||||
| -rw-r--r-- | compiler/GHC/StgToCmm/ArgRep.hs | 1 | ||||
| -rw-r--r-- | testsuite/tests/ghci/should_fail/Makefile | 3 | ||||
| -rw-r--r-- | testsuite/tests/ghci/should_fail/T20214.hs | 8 | ||||
| -rw-r--r-- | testsuite/tests/ghci/should_fail/T20214.stdout | 1 | ||||
| -rw-r--r-- | testsuite/tests/ghci/should_fail/all.T | 1 |
6 files changed, 17 insertions, 0 deletions
diff --git a/compiler/GHC/StgToByteCode.hs b/compiler/GHC/StgToByteCode.hs index 885af12944..a5931c2dd6 100644 --- a/compiler/GHC/StgToByteCode.hs +++ b/compiler/GHC/StgToByteCode.hs @@ -784,6 +784,9 @@ findPushSeq (D: rest) = (PUSH_APPLY_D, 1, rest) findPushSeq (L: rest) = (PUSH_APPLY_L, 1, rest) +findPushSeq argReps + | any (`elem` [V16, V32, V64]) argReps + = sorry "SIMD vector operations are not available in GHCi" findPushSeq _ = panic "GHC.StgToByteCode.findPushSeq" diff --git a/compiler/GHC/StgToCmm/ArgRep.hs b/compiler/GHC/StgToCmm/ArgRep.hs index cc618a16ed..9db0ed7afc 100644 --- a/compiler/GHC/StgToCmm/ArgRep.hs +++ b/compiler/GHC/StgToCmm/ArgRep.hs @@ -52,6 +52,7 @@ data ArgRep = P -- GC Ptr | V16 -- 16-byte (128-bit) vectors of Float/Double/Int8/Word32/etc. | V32 -- 32-byte (256-bit) vectors of Float/Double/Int8/Word32/etc. | V64 -- 64-byte (512-bit) vectors of Float/Double/Int8/Word32/etc. + deriving Eq instance Outputable ArgRep where ppr = text . argRepString argRepString :: ArgRep -> String diff --git a/testsuite/tests/ghci/should_fail/Makefile b/testsuite/tests/ghci/should_fail/Makefile index 9101fbd40a..c9fd6f0d6c 100644 --- a/testsuite/tests/ghci/should_fail/Makefile +++ b/testsuite/tests/ghci/should_fail/Makefile @@ -1,3 +1,6 @@ TOP=../../.. include $(TOP)/mk/boilerplate.mk include $(TOP)/mk/test.mk + +T20214: + "$(TEST_HC)" $(TEST_HC_OPTS_INTERACTIVE) T20214.hs 2>&1 | grep "SIMD" diff --git a/testsuite/tests/ghci/should_fail/T20214.hs b/testsuite/tests/ghci/should_fail/T20214.hs new file mode 100644 index 0000000000..da5d292b1d --- /dev/null +++ b/testsuite/tests/ghci/should_fail/T20214.hs @@ -0,0 +1,8 @@ +{-# LANGUAGE UnboxedTuples, MagicHash #-} + +module T20214 where + +import GHC.Exts + +main = print $ case unpackDoubleX2# (broadcastDoubleX2# 4.4##) of + (# a, b #) -> (D# a, D# b) diff --git a/testsuite/tests/ghci/should_fail/T20214.stdout b/testsuite/tests/ghci/should_fail/T20214.stdout new file mode 100644 index 0000000000..c416819de1 --- /dev/null +++ b/testsuite/tests/ghci/should_fail/T20214.stdout @@ -0,0 +1 @@ + SIMD vector operations are not available in GHCi diff --git a/testsuite/tests/ghci/should_fail/all.T b/testsuite/tests/ghci/should_fail/all.T index f2618ce08c..3e24f19ad3 100644 --- a/testsuite/tests/ghci/should_fail/all.T +++ b/testsuite/tests/ghci/should_fail/all.T @@ -5,3 +5,4 @@ test('T16013', [], ghci_script, ['T16013.script']) test('T16287', [], ghci_script, ['T16287.script']) test('T18052b', [], ghci_script, ['T18052b.script']) test('T18027a', [], ghci_script, ['T18027a.script']) +test('T20214', [], makefile_test, ['T20214']) |