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authorsheaf <sam.derbyshire@gmail.com>2023-01-27 13:43:53 +0100
committerMarge Bot <ben+marge-bot@smart-cactus.org>2023-01-31 15:51:06 -0500
commit78b9943073ae2e3afe3fd638a938e18b65cc3ef3 (patch)
tree21bb8f750d3da0d2657f181896695991639602d0
parent5618fc21dc480f88ac7cbe14337e72c92b8001d7 (diff)
downloadhaskell-78b9943073ae2e3afe3fd638a938e18b65cc3ef3.tar.gz
Revert "Cmm Lint: relax SIMD register assignment check"
This reverts commit 3be48877, which weakened a Cmm Lint check involving SIMD vectors. Now that we keep track of the type a global register is used at, we can restore the original stronger check.
-rw-r--r--compiler/GHC/Cmm/Lint.hs15
1 files changed, 1 insertions, 14 deletions
diff --git a/compiler/GHC/Cmm/Lint.hs b/compiler/GHC/Cmm/Lint.hs
index e6773d2d15..9c1d6db04b 100644
--- a/compiler/GHC/Cmm/Lint.hs
+++ b/compiler/GHC/Cmm/Lint.hs
@@ -172,21 +172,8 @@ lintCmmMiddle node = case node of
CmmAssign reg expr -> do
erep <- lintCmmExpr expr
let reg_ty = cmmRegType reg
- unless (compat_regs erep reg_ty) $
+ unless (erep `cmmEqType_ignoring_ptrhood` reg_ty) $
cmmLintAssignErr (CmmAssign reg expr) erep reg_ty
- where
- compat_regs :: CmmType -> CmmType -> Bool
- compat_regs ty1 ty2
- -- As noted in #22297, SIMD vector registers can be used for
- -- multiple different purposes, e.g. xmm1 can be used to hold 4 Floats,
- -- or 4 Int32s, or 2 Word64s, ...
- -- To allow this, we relax the check: we only ensure that the widths
- -- match, until we can find a more robust solution.
- | isVecType ty1
- , isVecType ty2
- = typeWidth ty1 == typeWidth ty2
- | otherwise
- = cmmEqType_ignoring_ptrhood ty1 ty2
CmmStore l r _alignment -> do
_ <- lintCmmExpr l