diff options
author | Moritz Angermann <moritz.angermann@gmail.com> | 2021-02-13 10:39:15 +0800 |
---|---|---|
committer | Moritz Angermann <moritz.angermann@gmail.com> | 2021-02-15 22:40:28 +0800 |
commit | a000a793df08002bf9618ea8e52a32096715e7c0 (patch) | |
tree | 5ee82b15b46577829dc9ddbc8671c05b1f57d7c0 | |
parent | 0a2791ccfa5846b3b3f8d0056830d0940aba956a (diff) | |
download | haskell-a000a793df08002bf9618ea8e52a32096715e7c0.tar.gz |
[arm] Rename arm64 to aarch64
arm64 is really only a name apple uses, and we should
refrain from using it across multiple architectures.
Let's call aarch64-darwin, arm64 if needed, but otherwise
stick to aarch64.
-rw-r--r-- | aclocal.m4 | 44 | ||||
-rw-r--r-- | compiler/GHC/Platform/AArch64.hs (renamed from compiler/GHC/Platform/ARM64.hs) | 3 | ||||
-rw-r--r-- | compiler/GHC/Platform/Regs.hs | 64 | ||||
-rw-r--r-- | compiler/cmm/PprC.hs | 2 | ||||
-rw-r--r-- | compiler/ghc.cabal.in | 2 | ||||
-rw-r--r-- | compiler/main/DriverPipeline.hs | 8 | ||||
-rw-r--r-- | compiler/nativeGen/AsmCodeGen.hs | 2 | ||||
-rw-r--r-- | compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs | 6 | ||||
-rw-r--r-- | compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs | 3 | ||||
-rw-r--r-- | compiler/nativeGen/RegAlloc/Linear/Main.hs | 3 | ||||
-rw-r--r-- | compiler/nativeGen/TargetReg.hs | 10 | ||||
-rw-r--r-- | includes/CodeGen.Platform.hs | 3 | ||||
-rw-r--r-- | libraries/ghc-boot/GHC/Platform.hs | 6 | ||||
-rw-r--r-- | libraries/ghci/GHCi/InfoTable.hsc | 6 | ||||
-rw-r--r-- | rts/StgCRun.c | 2 | ||||
-rw-r--r-- | rts/linker/elf_plt_aarch64.c | 4 | ||||
-rw-r--r-- | rts/linker/elf_reloc.c | 2 |
17 files changed, 90 insertions, 80 deletions
diff --git a/aclocal.m4 b/aclocal.m4 index a874d4ff66..c39aff28c8 100644 --- a/aclocal.m4 +++ b/aclocal.m4 @@ -118,7 +118,7 @@ AC_DEFUN([FPTOOLS_SET_PLATFORM_VARS], GHC_CONVERT_OS([$target_os], [$TargetArch], [TargetOS]) fi - GHC_LLVM_TARGET([$target_cpu],[$target_vendor],[$target_os],[LlvmTarget]) + GHC_LLVM_TARGET([$target],[$target_cpu],[$target_vendor],[$target_os],[LlvmTarget]) GHC_SELECT_FILE_EXTENSIONS([$host], [exeext_host], [soext_host]) GHC_SELECT_FILE_EXTENSIONS([$target], [exeext_target], [soext_target]) @@ -218,7 +218,7 @@ AC_DEFUN([FPTOOLS_SET_HASKELL_PLATFORM_VARS], test -z "[$]2" || eval "[$]2=\"ArchARM {armISA = \$ARM_ISA, armISAExt = \$ARM_ISA_EXT, armABI = \$ARM_ABI}\"" ;; aarch64) - test -z "[$]2" || eval "[$]2=ArchARM64" + test -z "[$]2" || eval "[$]2=ArchAArch64" ;; alpha) test -z "[$]2" || eval "[$]2=ArchAlpha" @@ -327,9 +327,14 @@ AC_DEFUN([FPTOOLS_SET_HASKELL_PLATFORM_VARS], AC_LINK_IFELSE( [AC_LANG_PROGRAM([], [__asm__ (".subsections_via_symbols");])], [AC_MSG_RESULT(yes) - TargetHasSubsectionsViaSymbols=YES - AC_DEFINE([HAVE_SUBSECTIONS_VIA_SYMBOLS],[1], + if test x"$TargetArch" = xaarch64; then + dnl subsections via symbols is busted on arm64 + TargetHasSubsectionsViaSymbols=NO + else + TargetHasSubsectionsViaSymbols=YES + AC_DEFINE([HAVE_SUBSECTIONS_VIA_SYMBOLS],[1], [Define to 1 if Apple-style dead-stripping is supported.]) + fi ], [TargetHasSubsectionsViaSymbols=NO AC_MSG_RESULT(no)]) @@ -1948,7 +1953,7 @@ AC_MSG_CHECKING(for path to top of build tree) # converts cpu from gnu to ghc naming, and assigns the result to $target_var AC_DEFUN([GHC_CONVERT_CPU],[ case "$1" in - aarch64*) + aarch64*|arm64*) $2="aarch64" ;; alpha*) @@ -2030,18 +2035,19 @@ case "$1" in esac ]) -# GHC_LLVM_TARGET(target_cpu, target_vendor, target_os, llvm_target_var) +# GHC_LLVM_TARGET(target, target_cpu, target_vendor, target_os, llvm_target_var) # -------------------------------- # converts the canonicalized target into someting llvm can understand AC_DEFUN([GHC_LLVM_TARGET], [ - case "$2-$3" in + llvm_target_cpu=$2 + case "$1" in *-freebsd*-gnueabihf) llvm_target_vendor="unknown" llvm_target_os="freebsd-gnueabihf" ;; - hardfloat-*eabi) + *-hardfloat-*eabi) llvm_target_vendor="unknown" - llvm_target_os="$3""hf" + llvm_target_os="$4""hf" ;; *-mingw32|*-mingw64|*-msys) llvm_target_vendor="unknown" @@ -2052,15 +2058,25 @@ AC_DEFUN([GHC_LLVM_TARGET], [ # turned into just `-linux` and fail to be found # in the `llvm-targets` file. *-android*|*-gnueabi*|*-musleabi*) - GHC_CONVERT_VENDOR([$2],[llvm_target_vendor]) - llvm_target_os="$3" + GHC_CONVERT_VENDOR([$3],[llvm_target_vendor]) + llvm_target_os="$4" + ;; + # apple is a bit about their naming scheme for + # aarch64; and clang on macOS doesn't know that + # aarch64 would be arm64. So for LLVM we'll need + # to call it arm64; while we'll refer to it internally + # as aarch64 for consistency and sanity. + aarch64-apple-*|arm64-apple-*) + llvm_target_cpu="arm64" + GHC_CONVERT_VENDOR([$3],[llvm_target_vendor]) + GHC_CONVERT_OS([$4],[$2],[llvm_target_os]) ;; *) - GHC_CONVERT_VENDOR([$2],[llvm_target_vendor]) - GHC_CONVERT_OS([$3],[$1],[llvm_target_os]) + GHC_CONVERT_VENDOR([$3],[llvm_target_vendor]) + GHC_CONVERT_OS([$4],[$2],[llvm_target_os]) ;; esac - $4="$1-$llvm_target_vendor-$llvm_target_os" + $5="$llvm_target_cpu-$llvm_target_vendor-$llvm_target_os" ]) diff --git a/compiler/GHC/Platform/ARM64.hs b/compiler/GHC/Platform/AArch64.hs index ebd66b92c5..94b5158d4a 100644 --- a/compiler/GHC/Platform/ARM64.hs +++ b/compiler/GHC/Platform/AArch64.hs @@ -1,10 +1,9 @@ {-# LANGUAGE CPP #-} -module GHC.Platform.ARM64 where +module GHC.Platform.AArch64 where import GhcPrelude #define MACHREGS_NO_REGS 0 #define MACHREGS_aarch64 1 #include "../../../includes/CodeGen.Platform.hs" - diff --git a/compiler/GHC/Platform/Regs.hs b/compiler/GHC/Platform/Regs.hs index fe6588d067..6e1891d0b7 100644 --- a/compiler/GHC/Platform/Regs.hs +++ b/compiler/GHC/Platform/Regs.hs @@ -1,4 +1,3 @@ - module GHC.Platform.Regs (callerSaves, activeStgRegs, haveRegBase, globalRegMaybe, freeReg) where @@ -10,7 +9,7 @@ import GHC.Platform import Reg import qualified GHC.Platform.ARM as ARM -import qualified GHC.Platform.ARM64 as ARM64 +import qualified GHC.Platform.AArch64 as AArch64 import qualified GHC.Platform.PPC as PPC import qualified GHC.Platform.S390X as S390X import qualified GHC.Platform.SPARC as SPARC @@ -26,12 +25,12 @@ callerSaves platform | platformUnregisterised platform = NoRegs.callerSaves | otherwise = case platformArch platform of - ArchX86 -> X86.callerSaves - ArchX86_64 -> X86_64.callerSaves - ArchS390X -> S390X.callerSaves - ArchSPARC -> SPARC.callerSaves - ArchARM {} -> ARM.callerSaves - ArchARM64 -> ARM64.callerSaves + ArchX86 -> X86.callerSaves + ArchX86_64 -> X86_64.callerSaves + ArchS390X -> S390X.callerSaves + ArchSPARC -> SPARC.callerSaves + ArchARM {} -> ARM.callerSaves + ArchAArch64 -> AArch64.callerSaves arch | arch `elem` [ArchPPC, ArchPPC_64 ELF_V1, ArchPPC_64 ELF_V2] -> PPC.callerSaves @@ -48,12 +47,12 @@ activeStgRegs platform | platformUnregisterised platform = NoRegs.activeStgRegs | otherwise = case platformArch platform of - ArchX86 -> X86.activeStgRegs - ArchX86_64 -> X86_64.activeStgRegs - ArchS390X -> S390X.activeStgRegs - ArchSPARC -> SPARC.activeStgRegs - ArchARM {} -> ARM.activeStgRegs - ArchARM64 -> ARM64.activeStgRegs + ArchX86 -> X86.activeStgRegs + ArchX86_64 -> X86_64.activeStgRegs + ArchS390X -> S390X.activeStgRegs + ArchSPARC -> SPARC.activeStgRegs + ArchARM {} -> ARM.activeStgRegs + ArchAArch64 -> AArch64.activeStgRegs arch | arch `elem` [ArchPPC, ArchPPC_64 ELF_V1, ArchPPC_64 ELF_V2] -> PPC.activeStgRegs @@ -65,12 +64,12 @@ haveRegBase platform | platformUnregisterised platform = NoRegs.haveRegBase | otherwise = case platformArch platform of - ArchX86 -> X86.haveRegBase - ArchX86_64 -> X86_64.haveRegBase - ArchS390X -> S390X.haveRegBase - ArchSPARC -> SPARC.haveRegBase - ArchARM {} -> ARM.haveRegBase - ArchARM64 -> ARM64.haveRegBase + ArchX86 -> X86.haveRegBase + ArchX86_64 -> X86_64.haveRegBase + ArchS390X -> S390X.haveRegBase + ArchSPARC -> SPARC.haveRegBase + ArchARM {} -> ARM.haveRegBase + ArchAArch64 -> AArch64.haveRegBase arch | arch `elem` [ArchPPC, ArchPPC_64 ELF_V1, ArchPPC_64 ELF_V2] -> PPC.haveRegBase @@ -82,12 +81,12 @@ globalRegMaybe platform | platformUnregisterised platform = NoRegs.globalRegMaybe | otherwise = case platformArch platform of - ArchX86 -> X86.globalRegMaybe - ArchX86_64 -> X86_64.globalRegMaybe - ArchS390X -> S390X.globalRegMaybe - ArchSPARC -> SPARC.globalRegMaybe - ArchARM {} -> ARM.globalRegMaybe - ArchARM64 -> ARM64.globalRegMaybe + ArchX86 -> X86.globalRegMaybe + ArchX86_64 -> X86_64.globalRegMaybe + ArchS390X -> S390X.globalRegMaybe + ArchSPARC -> SPARC.globalRegMaybe + ArchARM {} -> ARM.globalRegMaybe + ArchAArch64 -> AArch64.globalRegMaybe arch | arch `elem` [ArchPPC, ArchPPC_64 ELF_V1, ArchPPC_64 ELF_V2] -> PPC.globalRegMaybe @@ -99,15 +98,14 @@ freeReg platform | platformUnregisterised platform = NoRegs.freeReg | otherwise = case platformArch platform of - ArchX86 -> X86.freeReg - ArchX86_64 -> X86_64.freeReg - ArchS390X -> S390X.freeReg - ArchSPARC -> SPARC.freeReg - ArchARM {} -> ARM.freeReg - ArchARM64 -> ARM64.freeReg + ArchX86 -> X86.freeReg + ArchX86_64 -> X86_64.freeReg + ArchS390X -> S390X.freeReg + ArchSPARC -> SPARC.freeReg + ArchARM {} -> ARM.freeReg + ArchAArch64 -> AArch64.freeReg arch | arch `elem` [ArchPPC, ArchPPC_64 ELF_V1, ArchPPC_64 ELF_V2] -> PPC.freeReg | otherwise -> NoRegs.freeReg - diff --git a/compiler/cmm/PprC.hs b/compiler/cmm/PprC.hs index 546a5435fa..3ccf944c8e 100644 --- a/compiler/cmm/PprC.hs +++ b/compiler/cmm/PprC.hs @@ -1164,7 +1164,7 @@ cLoad expr rep bewareLoadStoreAlignment ArchMipseb = True bewareLoadStoreAlignment ArchMipsel = True bewareLoadStoreAlignment (ArchARM {}) = True - bewareLoadStoreAlignment ArchARM64 = True + bewareLoadStoreAlignment ArchAArch64 = True bewareLoadStoreAlignment ArchSPARC = True bewareLoadStoreAlignment ArchSPARC64 = True -- Pessimistically assume that they will also cause problems diff --git a/compiler/ghc.cabal.in b/compiler/ghc.cabal.in index b8186d2fa1..f717513217 100644 --- a/compiler/ghc.cabal.in +++ b/compiler/ghc.cabal.in @@ -291,7 +291,7 @@ Library Bitmap GHC.Platform.Regs GHC.Platform.ARM - GHC.Platform.ARM64 + GHC.Platform.AArch64 GHC.Platform.NoRegs GHC.Platform.PPC GHC.Platform.S390X diff --git a/compiler/main/DriverPipeline.hs b/compiler/main/DriverPipeline.hs index 04f50d7769..a0be34e8c0 100644 --- a/compiler/main/DriverPipeline.hs +++ b/compiler/main/DriverPipeline.hs @@ -1854,10 +1854,10 @@ linkBinary' staticLink dflags o_files dep_packages = do not staticLink && (platformOS platform == OSDarwin) && case platformArch platform of - ArchX86 -> True - ArchX86_64 -> True - ArchARM {} -> True - ArchARM64 -> True + ArchX86 -> True + ArchX86_64 -> True + ArchARM {} -> True + ArchAArch64 -> True _ -> False then ["-Wl,-no_compact_unwind"] else []) diff --git a/compiler/nativeGen/AsmCodeGen.hs b/compiler/nativeGen/AsmCodeGen.hs index 7d830d0337..73572730d6 100644 --- a/compiler/nativeGen/AsmCodeGen.hs +++ b/compiler/nativeGen/AsmCodeGen.hs @@ -172,7 +172,7 @@ nativeCodeGen dflags this_mod modLoc h us cmms ArchSPARC -> nCG' (sparcNcgImpl dflags) ArchSPARC64 -> panic "nativeCodeGen: No NCG for SPARC64" ArchARM {} -> panic "nativeCodeGen: No NCG for ARM" - ArchARM64 -> panic "nativeCodeGen: No NCG for ARM64" + ArchAArch64 -> panic "nativeCodeGen: No NCG for ARM64" ArchPPC_64 _ -> nCG' (ppcNcgImpl dflags) ArchAlpha -> panic "nativeCodeGen: No NCG for Alpha" ArchMipseb -> panic "nativeCodeGen: No NCG for mipseb" diff --git a/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs b/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs index 773db33293..723adf2cba 100644 --- a/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs +++ b/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs @@ -115,7 +115,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcInteger conflicts excl ArchSPARC64 -> panic "trivColorable ArchSPARC64" ArchPPC_64 _ -> 15 ArchARM _ _ _ -> panic "trivColorable ArchARM" - ArchARM64 -> panic "trivColorable ArchARM64" + ArchAArch64 -> panic "trivColorable ArchAArch64" ArchAlpha -> panic "trivColorable ArchAlpha" ArchMipseb -> panic "trivColorable ArchMipseb" ArchMipsel -> panic "trivColorable ArchMipsel" @@ -146,7 +146,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcFloat conflicts exclus ArchSPARC64 -> panic "trivColorable ArchSPARC64" ArchPPC_64 _ -> 0 ArchARM _ _ _ -> panic "trivColorable ArchARM" - ArchARM64 -> panic "trivColorable ArchARM64" + ArchAArch64 -> panic "trivColorable ArchAArch64" ArchAlpha -> panic "trivColorable ArchAlpha" ArchMipseb -> panic "trivColorable ArchMipseb" ArchMipsel -> panic "trivColorable ArchMipsel" @@ -179,7 +179,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcDouble conflicts exclu ArchSPARC64 -> panic "trivColorable ArchSPARC64" ArchPPC_64 _ -> 20 ArchARM _ _ _ -> panic "trivColorable ArchARM" - ArchARM64 -> panic "trivColorable ArchARM64" + ArchAArch64 -> panic "trivColorable ArchAArch64" ArchAlpha -> panic "trivColorable ArchAlpha" ArchMipseb -> panic "trivColorable ArchMipseb" ArchMipsel -> panic "trivColorable ArchMipsel" diff --git a/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs b/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs index 0feddc67d8..fdcd1a79bb 100644 --- a/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs +++ b/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs @@ -79,11 +79,10 @@ maxSpillSlots dflags ArchSPARC -> SPARC.Instr.maxSpillSlots dflags ArchSPARC64 -> panic "maxSpillSlots ArchSPARC64" ArchARM _ _ _ -> panic "maxSpillSlots ArchARM" - ArchARM64 -> panic "maxSpillSlots ArchARM64" + ArchAArch64 -> panic "maxSpillSlots ArchAArch64" ArchPPC_64 _ -> PPC.Instr.maxSpillSlots dflags ArchAlpha -> panic "maxSpillSlots ArchAlpha" ArchMipseb -> panic "maxSpillSlots ArchMipseb" ArchMipsel -> panic "maxSpillSlots ArchMipsel" ArchJavaScript-> panic "maxSpillSlots ArchJavaScript" ArchUnknown -> panic "maxSpillSlots ArchUnknown" - diff --git a/compiler/nativeGen/RegAlloc/Linear/Main.hs b/compiler/nativeGen/RegAlloc/Linear/Main.hs index eac9194c6a..1f1a37dc9c 100644 --- a/compiler/nativeGen/RegAlloc/Linear/Main.hs +++ b/compiler/nativeGen/RegAlloc/Linear/Main.hs @@ -216,7 +216,7 @@ linearRegAlloc dflags entry_ids block_live sccs ArchSPARC64 -> panic "linearRegAlloc ArchSPARC64" ArchPPC -> go $ (frInitFreeRegs platform :: PPC.FreeRegs) ArchARM _ _ _ -> panic "linearRegAlloc ArchARM" - ArchARM64 -> panic "linearRegAlloc ArchARM64" + ArchAArch64 -> panic "linearRegAlloc ArchAArch64" ArchPPC_64 _ -> go $ (frInitFreeRegs platform :: PPC.FreeRegs) ArchAlpha -> panic "linearRegAlloc ArchAlpha" ArchMipseb -> panic "linearRegAlloc ArchMipseb" @@ -915,4 +915,3 @@ loadTemp vreg (ReadMem slot) hreg spills loadTemp _ _ _ spills = return spills - diff --git a/compiler/nativeGen/TargetReg.hs b/compiler/nativeGen/TargetReg.hs index e0eca9235d..a30ae71790 100644 --- a/compiler/nativeGen/TargetReg.hs +++ b/compiler/nativeGen/TargetReg.hs @@ -49,7 +49,7 @@ targetVirtualRegSqueeze platform ArchSPARC64 -> panic "targetVirtualRegSqueeze ArchSPARC64" ArchPPC_64 _ -> PPC.virtualRegSqueeze ArchARM _ _ _ -> panic "targetVirtualRegSqueeze ArchARM" - ArchARM64 -> panic "targetVirtualRegSqueeze ArchARM64" + ArchAArch64 -> panic "targetVirtualRegSqueeze ArchAArch64" ArchAlpha -> panic "targetVirtualRegSqueeze ArchAlpha" ArchMipseb -> panic "targetVirtualRegSqueeze ArchMipseb" ArchMipsel -> panic "targetVirtualRegSqueeze ArchMipsel" @@ -68,7 +68,7 @@ targetRealRegSqueeze platform ArchSPARC64 -> panic "targetRealRegSqueeze ArchSPARC64" ArchPPC_64 _ -> PPC.realRegSqueeze ArchARM _ _ _ -> panic "targetRealRegSqueeze ArchARM" - ArchARM64 -> panic "targetRealRegSqueeze ArchARM64" + ArchAArch64 -> panic "targetRealRegSqueeze ArchAArch64" ArchAlpha -> panic "targetRealRegSqueeze ArchAlpha" ArchMipseb -> panic "targetRealRegSqueeze ArchMipseb" ArchMipsel -> panic "targetRealRegSqueeze ArchMipsel" @@ -86,7 +86,7 @@ targetClassOfRealReg platform ArchSPARC64 -> panic "targetClassOfRealReg ArchSPARC64" ArchPPC_64 _ -> PPC.classOfRealReg ArchARM _ _ _ -> panic "targetClassOfRealReg ArchARM" - ArchARM64 -> panic "targetClassOfRealReg ArchARM64" + ArchAArch64 -> panic "targetClassOfRealReg ArchAArch64" ArchAlpha -> panic "targetClassOfRealReg ArchAlpha" ArchMipseb -> panic "targetClassOfRealReg ArchMipseb" ArchMipsel -> panic "targetClassOfRealReg ArchMipsel" @@ -104,7 +104,7 @@ targetMkVirtualReg platform ArchSPARC64 -> panic "targetMkVirtualReg ArchSPARC64" ArchPPC_64 _ -> PPC.mkVirtualReg ArchARM _ _ _ -> panic "targetMkVirtualReg ArchARM" - ArchARM64 -> panic "targetMkVirtualReg ArchARM64" + ArchAArch64 -> panic "targetMkVirtualReg ArchAArch64" ArchAlpha -> panic "targetMkVirtualReg ArchAlpha" ArchMipseb -> panic "targetMkVirtualReg ArchMipseb" ArchMipsel -> panic "targetMkVirtualReg ArchMipsel" @@ -122,7 +122,7 @@ targetRegDotColor platform ArchSPARC64 -> panic "targetRegDotColor ArchSPARC64" ArchPPC_64 _ -> PPC.regDotColor ArchARM _ _ _ -> panic "targetRegDotColor ArchARM" - ArchARM64 -> panic "targetRegDotColor ArchARM64" + ArchAArch64 -> panic "targetRegDotColor ArchAArch64" ArchAlpha -> panic "targetRegDotColor ArchAlpha" ArchMipseb -> panic "targetRegDotColor ArchMipseb" ArchMipsel -> panic "targetRegDotColor ArchMipsel" diff --git a/includes/CodeGen.Platform.hs b/includes/CodeGen.Platform.hs index b108a61c0a..50f116f3b1 100644 --- a/includes/CodeGen.Platform.hs +++ b/includes/CodeGen.Platform.hs @@ -94,7 +94,7 @@ import Reg # define zmm14 30 # define zmm15 31 --- Note: these are only needed for ARM/ARM64 because globalRegMaybe is now used in CmmSink.hs. +-- Note: these are only needed for ARM/AArch64 because globalRegMaybe is now used in CmmSink.hs. -- Since it's only used to check 'isJust', the actual values don't matter, thus -- I'm not sure if these are the correct numberings. -- Normally, the register names are just stringified as part of the REG() macro @@ -1096,4 +1096,3 @@ freeReg _ = True freeReg = panic "freeReg not defined for this platform" #endif - diff --git a/libraries/ghc-boot/GHC/Platform.hs b/libraries/ghc-boot/GHC/Platform.hs index 341b551fc5..d11015a54c 100644 --- a/libraries/ghc-boot/GHC/Platform.hs +++ b/libraries/ghc-boot/GHC/Platform.hs @@ -114,7 +114,7 @@ data Arch , armISAExt :: [ArmISAExt] , armABI :: ArmABI } - | ArchARM64 + | ArchAArch64 | ArchAlpha | ArchMipseb | ArchMipsel @@ -155,7 +155,7 @@ stringEncodeArch = \case ARMv5 -> "v5" ARMv6 -> "v6" ARMv7 -> "v7" - ArchARM64 -> "aarch64" + ArchAArch64 -> "aarch64" ArchAlpha -> "alpha" ArchMipseb -> "mipseb" ArchMipsel -> "mipsel" @@ -163,7 +163,7 @@ stringEncodeArch = \case isARM :: Arch -> Bool isARM (ArchARM {}) = True -isARM ArchARM64 = True +isARM ArchAArch64 = True isARM _ = False -- | Operating systems that the native code generator knows about. diff --git a/libraries/ghci/GHCi/InfoTable.hsc b/libraries/ghci/GHCi/InfoTable.hsc index 587e39bbed..e48f041b56 100644 --- a/libraries/ghci/GHCi/InfoTable.hsc +++ b/libraries/ghci/GHCi/InfoTable.hsc @@ -73,7 +73,7 @@ data Arch = ArchSPARC | ArchX86_64 | ArchAlpha | ArchARM - | ArchARM64 + | ArchAArch64 | ArchPPC64 | ArchPPC64LE | ArchS390X @@ -95,7 +95,7 @@ platform = #elif defined(arm_HOST_ARCH) ArchARM #elif defined(aarch64_HOST_ARCH) - ArchARM64 + ArchAArch64 #elif defined(powerpc64_HOST_ARCH) ArchPPC64 #elif defined(powerpc64le_HOST_ARCH) @@ -211,7 +211,7 @@ mkJumpToAddr a = case platform of , 0x11, 0xff, 0x2f, 0xe1 , byte0 w32, byte1 w32, byte2 w32, byte3 w32] - ArchARM64 { } -> + ArchAArch64 { } -> -- Generates: -- -- ldr x1, label diff --git a/rts/StgCRun.c b/rts/StgCRun.c index ddb19b468b..6ce50fcae8 100644 --- a/rts/StgCRun.c +++ b/rts/StgCRun.c @@ -991,7 +991,7 @@ StgRun(StgFunPtr f, StgRegTable *basereg) { */ "add sp, sp, %3\n\t" /* - * Return the new register table, taking it from Stg's R1 (ARM64's R22). + * Return the new register table, taking it from Stg's R1 (AArch64's R22). */ "mov %0, x22\n\t" /* diff --git a/rts/linker/elf_plt_aarch64.c b/rts/linker/elf_plt_aarch64.c index 6a9d1ddd94..11354a63db 100644 --- a/rts/linker/elf_plt_aarch64.c +++ b/rts/linker/elf_plt_aarch64.c @@ -46,8 +46,8 @@ bool needStubForRelaAarch64(Elf_Rela * rela) { bool makeStubAarch64(Stub * s) { // We (the linker) may corrupt registers x16 (IP0) and x17 (IP1) [AAPCS64] - // and the condition flags, according to the "ELF for the ARM64 - // Architecture". + // and the condition flags, according to the "ELF for the ARM 64-bit + // Architecture (AArch64)". // // [Special purpose regs] // X16 and X17 are IP0 and IP1, intra-procedure-call temporary registers. diff --git a/rts/linker/elf_reloc.c b/rts/linker/elf_reloc.c index 410a23607b..c2271b6e60 100644 --- a/rts/linker/elf_reloc.c +++ b/rts/linker/elf_reloc.c @@ -4,7 +4,7 @@ #if defined(OBJFORMAT_ELF) -/* we currently only use this abstraction for elf/arm64 */ +/* we currently only use this abstraction for elf/aarch64 */ #if defined(aarch64_HOST_ARCH) bool |