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authorBen Gamari <ben@smart-cactus.org>2020-08-21 11:55:43 -0400
committerBen Gamari <ben@smart-cactus.org>2020-09-17 19:46:29 -0400
commit3309d2a2700a5c4d197bcd14b4fc47d19dce6962 (patch)
tree2de6e8ae2bb1ecbcc78ec3203e33189cac54f85a
parentefc41fccdf1d4850355c699b89b993802fdbd878 (diff)
downloadhaskell-3309d2a2700a5c4d197bcd14b4fc47d19dce6962.tar.gz
rts/nonmoving: Add missing STM write barrier
When updating a TRec for a TVar already part of a transaction we previously neglected to add the old value to the update remembered set. I suspect this was the cause of #18587. (cherry picked from commit a64e94f98ca18e53ecc13f736d50b9cb2d156b05)
-rw-r--r--rts/STM.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/rts/STM.c b/rts/STM.c
index 5f72c0ebfb..cff0d55082 100644
--- a/rts/STM.c
+++ b/rts/STM.c
@@ -1342,6 +1342,9 @@ void stmWriteTVar(Capability *cap,
if (entry != NULL) {
if (entry_in == trec) {
// Entry found in our trec
+ IF_NONMOVING_WRITE_BARRIER_ENABLED {
+ updateRemembSetPushClosure(cap, (StgClosure *) entry->new_value);
+ }
entry -> new_value = new_value;
} else {
// Entry found in another trec