cmm: Drop LongReg GlobalRegswip/drop-long-reg

This register is not mapped to a machine register on any platform that
we currently support. Consequently, it doesn't really make sense to
carry around the infrastructure for this register.

17 files changed, 33 insertions, 122 deletions

diff --git a/compiler/CodeGen.Platform.h b/compiler/CodeGen.Platform.h
index a216d266dd..2b2c7844c0 100644
--- a/compiler/CodeGen.Platform.h
+++ b/compiler/CodeGen.Platform.h
@@ -449,9 +449,6 @@ callerSaves (DoubleReg 5)     = True
 #if defined(CALLER_SAVES_D6)
 callerSaves (DoubleReg 6)     = True
 #endif
-#if defined(CALLER_SAVES_L1)
-callerSaves (LongReg 1)       = True
-#endif
 #if defined(CALLER_SAVES_Sp)
 callerSaves Sp                = True
 #endif
@@ -797,12 +794,6 @@ globalRegMaybe (ZmmReg 6)               = Just (RealRegSingle REG_ZMM6)
 # if defined(REG_Sp)
 globalRegMaybe Sp                       = Just (RealRegSingle REG_Sp)
 # endif
-# if defined(REG_Lng1)
-globalRegMaybe (LongReg 1)              = Just (RealRegSingle REG_Lng1)
-# endif
-# if defined(REG_Lng2)
-globalRegMaybe (LongReg 2)              = Just (RealRegSingle REG_Lng2)
-# endif
 # if defined(REG_SpLim)
 globalRegMaybe SpLim                    = Just (RealRegSingle REG_SpLim)
 # endif
diff --git a/compiler/GHC/Cmm/CallConv.hs b/compiler/GHC/Cmm/CallConv.hs
index a0fee0e5c6..5986f5e674 100644
--- a/compiler/GHC/Cmm/CallConv.hs
+++ b/compiler/GHC/Cmm/CallConv.hs
@@ -68,29 +68,27 @@ assignArgumentsPos profile off conv arg_ty reps = (stk_off, assignments)
                                     | isFloatType ty = float
                                     | otherwise      = int
         where vec = case (w, regs) of
-                      (W128, (vs, fs, ds, ls, s:ss))
-                          | passVectorInReg W128 profile -> k (RegisterParam (XmmReg s), (vs, fs, ds, ls, ss))
-                      (W256, (vs, fs, ds, ls, s:ss))
-                          | passVectorInReg W256 profile -> k (RegisterParam (YmmReg s), (vs, fs, ds, ls, ss))
-                      (W512, (vs, fs, ds, ls, s:ss))
-                          | passVectorInReg W512 profile -> k (RegisterParam (ZmmReg s), (vs, fs, ds, ls, ss))
+                      (W128, (vs, fs, ds, s:ss))
+                          | passVectorInReg W128 profile -> k (RegisterParam (XmmReg s), (vs, fs, ds, ss))
+                      (W256, (vs, fs, ds, s:ss))
+                          | passVectorInReg W256 profile -> k (RegisterParam (YmmReg s), (vs, fs, ds, ss))
+                      (W512, (vs, fs, ds, s:ss))
+                          | passVectorInReg W512 profile -> k (RegisterParam (ZmmReg s), (vs, fs, ds, ss))
                       _ -> (assts, (r:rs))
               float = case (w, regs) of
-                        (W32, (vs, fs, ds, ls, s:ss))
-                            | passFloatInXmm          -> k (RegisterParam (FloatReg s), (vs, fs, ds, ls, ss))
-                        (W32, (vs, f:fs, ds, ls, ss))
-                            | not passFloatInXmm      -> k (RegisterParam f, (vs, fs, ds, ls, ss))
-                        (W64, (vs, fs, ds, ls, s:ss))
-                            | passFloatInXmm          -> k (RegisterParam (DoubleReg s), (vs, fs, ds, ls, ss))
-                        (W64, (vs, fs, d:ds, ls, ss))
-                            | not passFloatInXmm      -> k (RegisterParam d, (vs, fs, ds, ls, ss))
+                        (W32, (vs, fs, ds, s:ss))
+                            | passFloatInXmm          -> k (RegisterParam (FloatReg s), (vs, fs, ds, ss))
+                        (W32, (vs, f:fs, ds, ss))
+                            | not passFloatInXmm      -> k (RegisterParam f, (vs, fs, ds, ss))
+                        (W64, (vs, fs, ds, s:ss))
+                            | passFloatInXmm          -> k (RegisterParam (DoubleReg s), (vs, fs, ds, ss))
+                        (W64, (vs, fs, d:ds, ss))
+                            | not passFloatInXmm      -> k (RegisterParam d, (vs, fs, ds, ss))
                         _ -> (assts, (r:rs))
               int = case (w, regs) of
                       (W128, _) -> panic "W128 unsupported register type"
-                      (_, (v:vs, fs, ds, ls, ss)) | widthInBits w <= widthInBits (wordWidth platform)
-                          -> k (RegisterParam (v gcp), (vs, fs, ds, ls, ss))
-                      (_, (vs, fs, ds, l:ls, ss)) | widthInBits w > widthInBits (wordWidth platform)
-                          -> k (RegisterParam l, (vs, fs, ds, ls, ss))
+                      (_, (v:vs, fs, ds, ss)) | widthInBits w <= widthInBits (wordWidth platform)
+                          -> k (RegisterParam (v gcp), (vs, fs, ds, ss))
                       _   -> (assts, (r:rs))
               k (asst, regs') = assign_regs ((r, asst) : assts) rs regs'
               ty = arg_ty r
@@ -134,7 +132,6 @@ assignStack platform offset arg_ty args = assign_stk offset [] (reverse args)
 type AvailRegs = ( [VGcPtr -> GlobalReg]   -- available vanilla regs.
                  , [GlobalReg]   -- floats
                  , [GlobalReg]   -- doubles
-                 , [GlobalReg]   -- longs (int64 and word64)
                  , [Int]         -- XMM (floats and doubles)
                  )
 
@@ -149,7 +146,6 @@ getRegsWithoutNode platform =
   ( filter (\r -> r VGcPtr /= node) (realVanillaRegs platform)
   , realFloatRegs platform
   , realDoubleRegs platform
-  , realLongRegs platform
   , realXmmRegNos platform)
 
 -- getRegsWithNode uses R1/node even if it isn't a register
@@ -159,26 +155,23 @@ getRegsWithNode platform =
     else realVanillaRegs platform
   , realFloatRegs platform
   , realDoubleRegs platform
-  , realLongRegs platform
   , realXmmRegNos platform)
 
-allFloatRegs, allDoubleRegs, allLongRegs :: Platform -> [GlobalReg]
+allFloatRegs, allDoubleRegs :: Platform -> [GlobalReg]
 allVanillaRegs :: Platform -> [VGcPtr -> GlobalReg]
 allXmmRegs :: Platform -> [Int]
 
 allVanillaRegs platform = map VanillaReg $ regList (pc_MAX_Vanilla_REG (platformConstants platform))
 allFloatRegs   platform = map FloatReg   $ regList (pc_MAX_Float_REG   (platformConstants platform))
 allDoubleRegs  platform = map DoubleReg  $ regList (pc_MAX_Double_REG  (platformConstants platform))
-allLongRegs    platform = map LongReg    $ regList (pc_MAX_Long_REG    (platformConstants platform))
 allXmmRegs     platform =                  regList (pc_MAX_XMM_REG     (platformConstants platform))
 
-realFloatRegs, realDoubleRegs, realLongRegs :: Platform -> [GlobalReg]
+realFloatRegs, realDoubleRegs :: Platform -> [GlobalReg]
 realVanillaRegs :: Platform -> [VGcPtr -> GlobalReg]
 
 realVanillaRegs platform = map VanillaReg $ regList (pc_MAX_Real_Vanilla_REG (platformConstants platform))
 realFloatRegs   platform = map FloatReg   $ regList (pc_MAX_Real_Float_REG   (platformConstants platform))
 realDoubleRegs  platform = map DoubleReg  $ regList (pc_MAX_Real_Double_REG  (platformConstants platform))
-realLongRegs    platform = map LongReg    $ regList (pc_MAX_Real_Long_REG    (platformConstants platform))
 
 realXmmRegNos :: Platform -> [Int]
 realXmmRegNos platform
@@ -192,12 +185,11 @@ allRegs :: Platform -> AvailRegs
 allRegs platform = ( allVanillaRegs platform
                    , allFloatRegs   platform
                    , allDoubleRegs  platform
-                   , allLongRegs    platform
                    , allXmmRegs     platform
                    )
 
 nodeOnly :: AvailRegs
-nodeOnly = ([VanillaReg 1], [], [], [], [])
+nodeOnly = ([VanillaReg 1], [], [], [])
 
 -- This returns the set of global registers that *cover* the machine registers
 -- used for argument passing. On platforms where registers can overlap---right
@@ -208,7 +200,6 @@ realArgRegsCover :: Platform -> [GlobalReg]
 realArgRegsCover platform
     | passFloatArgsInXmm platform
     = map ($ VGcPtr) (realVanillaRegs platform) ++
-      realLongRegs platform ++
       realDoubleRegs platform -- we only need to save the low Double part of XMM registers.
                               -- Moreover, the NCG can't load/store full XMM
                               -- registers for now...
@@ -216,8 +207,7 @@ realArgRegsCover platform
     | otherwise
     = map ($ VGcPtr) (realVanillaRegs platform) ++
       realFloatRegs  platform ++
-      realDoubleRegs platform ++
-      realLongRegs   platform
+      realDoubleRegs platform
       -- we don't save XMM registers if they are not used for parameter passing
 
 -- Like realArgRegsCover but always includes the node. This covers the real
diff --git a/compiler/GHC/Cmm/Lexer.x b/compiler/GHC/Cmm/Lexer.x
index bf379ec7da..abb674ef38 100644
--- a/compiler/GHC/Cmm/Lexer.x
+++ b/compiler/GHC/Cmm/Lexer.x
@@ -103,7 +103,6 @@ $white_no_nl+           ;
   R@decimal             { global_regN (\n -> VanillaReg n VNonGcPtr) }
   F@decimal             { global_regN FloatReg }
   D@decimal             { global_regN DoubleReg }
-  L@decimal             { global_regN LongReg }
   Sp                    { global_reg Sp }
   SpLim                 { global_reg SpLim }
   Hp                    { global_reg Hp }
diff --git a/compiler/GHC/Cmm/Reg.hs b/compiler/GHC/Cmm/Reg.hs
index 6c94ecb2eb..911e27fdc0 100644
--- a/compiler/GHC/Cmm/Reg.hs
+++ b/compiler/GHC/Cmm/Reg.hs
@@ -142,9 +142,6 @@ data GlobalReg
   | DoubleReg           -- double-precision floating-point registers
         {-# UNPACK #-} !Int     -- its number
 
-  | LongReg             -- long int registers (64-bit, really)
-        {-# UNPACK #-} !Int     -- its number
-
   | XmmReg                      -- 128-bit SIMD vector register
         {-# UNPACK #-} !Int     -- its number
 
@@ -197,7 +194,6 @@ instance Eq GlobalReg where
    VanillaReg i _ == VanillaReg j _ = i==j -- Ignore type when seeking clashes
    FloatReg i == FloatReg j = i==j
    DoubleReg i == DoubleReg j = i==j
-   LongReg i == LongReg j = i==j
    -- NOTE: XMM, YMM, ZMM registers actually are the same registers
    -- at least with respect to store at YMM i and then read from XMM i
    -- and similarly for ZMM etc.
@@ -228,7 +224,6 @@ instance Ord GlobalReg where
      -- Ignore type when seeking clashes
    compare (FloatReg i)  (FloatReg  j) = compare i j
    compare (DoubleReg i) (DoubleReg j) = compare i j
-   compare (LongReg i)   (LongReg   j) = compare i j
    compare (XmmReg i)    (XmmReg    j) = compare i j
    compare (YmmReg i)    (YmmReg    j) = compare i j
    compare (ZmmReg i)    (ZmmReg    j) = compare i j
@@ -253,8 +248,6 @@ instance Ord GlobalReg where
    compare _ (FloatReg _)     = GT
    compare (DoubleReg _) _    = LT
    compare _ (DoubleReg _)    = GT
-   compare (LongReg _) _      = LT
-   compare _ (LongReg _)      = GT
    compare (XmmReg _) _       = LT
    compare _ (XmmReg _)       = GT
    compare (YmmReg _) _       = LT
@@ -305,7 +298,6 @@ pprGlobalReg gr
 --        VanillaReg n VGcPtr    -> char 'P' <> int n
         FloatReg   n   -> char 'F' <> int n
         DoubleReg  n   -> char 'D' <> int n
-        LongReg    n   -> char 'L' <> int n
         XmmReg     n   -> text "XMM" <> int n
         YmmReg     n   -> text "YMM" <> int n
         ZmmReg     n   -> text "ZMM" <> int n
@@ -349,7 +341,6 @@ globalRegType platform = \case
    (VanillaReg _ VNonGcPtr) -> bWord platform
    (FloatReg _)             -> cmmFloat W32
    (DoubleReg _)            -> cmmFloat W64
-   (LongReg _)              -> cmmBits W64
    -- TODO: improve the internal model of SIMD/vectorized registers
    -- the right design SHOULd improve handling of float and double code too.
    -- see remarks in Note [SIMD Design for the future] in GHC.StgToCmm.Prim
@@ -365,7 +356,6 @@ isArgReg :: GlobalReg -> Bool
 isArgReg (VanillaReg {}) = True
 isArgReg (FloatReg {})   = True
 isArgReg (DoubleReg {})  = True
-isArgReg (LongReg {})    = True
 isArgReg (XmmReg {})     = True
 isArgReg (YmmReg {})     = True
 isArgReg (ZmmReg {})     = True
diff --git a/compiler/GHC/CmmToC.hs b/compiler/GHC/CmmToC.hs
index 44d4657052..05b32239f4 100644
--- a/compiler/GHC/CmmToC.hs
+++ b/compiler/GHC/CmmToC.hs
@@ -1126,7 +1126,6 @@ pprGlobalReg gr = case gr of
         --              JMP_(*R1.p);
     FloatReg   n   -> char 'F' <> int n
     DoubleReg  n   -> char 'D' <> int n
-    LongReg    n   -> char 'L' <> int n
     Sp             -> text "Sp"
     SpLim          -> text "SpLim"
     Hp             -> text "Hp"
diff --git a/compiler/GHC/CmmToLlvm/Regs.hs b/compiler/GHC/CmmToLlvm/Regs.hs
index b18df77ed4..81505652a3 100644
--- a/compiler/GHC/CmmToLlvm/Regs.hs
+++ b/compiler/GHC/CmmToLlvm/Regs.hs
@@ -81,7 +81,7 @@ lmGlobalReg platform suf reg
         MachSp         -> wordGlobal $ "MachSp" ++ suf
         _other         -> panic $ "GHC.CmmToLlvm.Reg: GlobalReg (" ++ (show reg)
                                 ++ ") not supported!"
-        -- LongReg, HpLim, CCSS, CurrentTSO, CurrentNusery, HpAlloc
+        -- HpLim, CCSS, CurrentTSO, CurrentNusery, HpAlloc
         -- EagerBlackholeInfo, GCEnter1, GCFun, BaseReg, PicBaseReg
     where
         wordGlobal   name = LMNLocalVar (fsLit name) (llvmWord platform)
diff --git a/compiler/GHC/StgToCmm/CgUtils.hs b/compiler/GHC/StgToCmm/CgUtils.hs
index 4718cbf74a..d26602b0fd 100644
--- a/compiler/GHC/StgToCmm/CgUtils.hs
+++ b/compiler/GHC/StgToCmm/CgUtils.hs
@@ -81,8 +81,6 @@ baseRegOffset platform reg = case reg of
    ZmmReg n             -> panic ("Registers above ZMM6 are not supported (tried to use ZMM" ++ show n ++ ")")
    Sp                   -> pc_OFFSET_StgRegTable_rSp    constants
    SpLim                -> pc_OFFSET_StgRegTable_rSpLim constants
-   LongReg 1            -> pc_OFFSET_StgRegTable_rL1    constants
-   LongReg n            -> panic ("Registers above L1 are not supported (tried to use L" ++ show n ++ ")")
    Hp                   -> pc_OFFSET_StgRegTable_rHp             constants
    HpLim                -> pc_OFFSET_StgRegTable_rHpLim          constants
    CCCS                 -> pc_OFFSET_StgRegTable_rCCCS           constants
diff --git a/compiler/GHC/StgToCmm/Heap.hs b/compiler/GHC/StgToCmm/Heap.hs
index a7e7f23e9d..a1490e5f28 100644
--- a/compiler/GHC/StgToCmm/Heap.hs
+++ b/compiler/GHC/StgToCmm/Heap.hs
@@ -471,7 +471,6 @@ cannedGCEntryPoint platform regs
                                   _         -> Nothing
 
           | width == wordWidth platform -> Just (mkGcLabel "stg_gc_unbx_r1")
-          | width == W64                -> Just (mkGcLabel "stg_gc_l1")
           | otherwise                   -> Nothing
           where
               width = typeWidth ty
diff --git a/rts/HeapStackCheck.cmm b/rts/HeapStackCheck.cmm
index 8ab8356550..186b740c1c 100644
--- a/rts/HeapStackCheck.cmm
+++ b/rts/HeapStackCheck.cmm
@@ -338,13 +338,6 @@ stg_gc_d1 return (D_ d)
 }
 
 
-/*-- L1 contains an int64 ------------------------------------------------- */
-
-stg_gc_l1 return (L_ l)
-{
-    jump stg_gc_noregs (stg_ret_l_info, l) ();
-}
-
 /*-- Unboxed tuples with multiple pointers -------------------------------- */
 
 stg_gc_pp return (P_ arg1, P_ arg2)
diff --git a/rts/Interpreter.c b/rts/Interpreter.c
index 581238c36a..57fba55b35 100644
--- a/rts/Interpreter.c
+++ b/rts/Interpreter.c
@@ -1337,19 +1337,6 @@ run_BCO:
             goto nextInsn;
         }
 
-        case bci_PUSH_ALTS_L: {
-            int o_bco  = BCO_GET_LARGE_ARG;
-            SpW(-2) = (W_)&stg_ctoi_L1_info;
-            SpW(-1) = BCO_PTR(o_bco);
-            Sp_subW(2);
-#if defined(PROFILING)
-            Sp_subW(2);
-            SpW(1) = (W_)cap->r.rCCCS;
-            SpW(0) = (W_)&stg_restore_cccs_info;
-#endif
-            goto nextInsn;
-        }
-
         case bci_PUSH_ALTS_V: {
             int o_bco  = BCO_GET_LARGE_ARG;
             SpW(-2) = (W_)&stg_ctoi_V_info;
diff --git a/rts/RtsSymbols.c b/rts/RtsSymbols.c
index 317b284158..7319663ae1 100644
--- a/rts/RtsSymbols.c
+++ b/rts/RtsSymbols.c
@@ -605,7 +605,6 @@ extern char **environ;
       SymI_HasDataProto(stg_gc_unbx_r1)                                     \
       SymI_HasDataProto(stg_gc_f1)                                          \
       SymI_HasDataProto(stg_gc_d1)                                          \
-      SymI_HasDataProto(stg_gc_l1)                                          \
       SymI_HasDataProto(stg_gc_pp)                                          \
       SymI_HasDataProto(stg_gc_ppp)                                         \
       SymI_HasDataProto(stg_gc_pppp)                                        \
diff --git a/rts/StgMiscClosures.cmm b/rts/StgMiscClosures.cmm
index ff0ec062f8..dbc9d8a02e 100644
--- a/rts/StgMiscClosures.cmm
+++ b/rts/StgMiscClosures.cmm
@@ -179,18 +179,6 @@ INFO_TABLE_RET( stg_ctoi_D1, RET_BCO )
 }
 
 /*
- * When the returned value is in L1
- */
-INFO_TABLE_RET( stg_ctoi_L1, RET_BCO )
-    /* explicit stack */
-{
-    Sp_adj(-1) - 8;
-    L_[Sp + WDS(1)] = L1;
-    Sp(0) = stg_ret_l_info;
-    jump stg_yield_to_interpreter [];
-}
-
-/*
  * When the returned value is a void
  */
 INFO_TABLE_RET( stg_ctoi_V, RET_BCO )
diff --git a/rts/include/stg/MachRegs.h b/rts/include/stg/MachRegs.h
index 6c66e112b2..372dfe0393 100644
--- a/rts/include/stg/MachRegs.h
+++ b/rts/include/stg/MachRegs.h
@@ -123,7 +123,6 @@
 #define MAX_REAL_VANILLA_REG 1  /* always, since it defines the entry conv */
 #define MAX_REAL_FLOAT_REG   0
 #define MAX_REAL_DOUBLE_REG  0
-#define MAX_REAL_LONG_REG    0
 #define MAX_REAL_XMM_REG     4
 #define MAX_REAL_YMM_REG     4
 #define MAX_REAL_ZMM_REG     4
@@ -269,7 +268,6 @@ the stack. See Note [Overlapping global registers] for implications.
 #define MAX_REAL_VANILLA_REG 6
 #define MAX_REAL_FLOAT_REG   6
 #define MAX_REAL_DOUBLE_REG  6
-#define MAX_REAL_LONG_REG    0
 #define MAX_REAL_XMM_REG     6
 #define MAX_REAL_YMM_REG     6
 #define MAX_REAL_ZMM_REG     6
@@ -684,14 +682,6 @@ the stack. See Note [Overlapping global registers] for implications.
 #  endif
 #endif
 
-#if !defined(MAX_REAL_LONG_REG)
-#  if   defined(REG_L1)
-#  define MAX_REAL_LONG_REG 1
-#  else
-#  define MAX_REAL_LONG_REG 0
-#  endif
-#endif
-
 #if !defined(MAX_REAL_XMM_REG)
 #  if   defined(REG_XMM6)
 #  define MAX_REAL_XMM_REG 6
diff --git a/rts/include/stg/MiscClosures.h b/rts/include/stg/MiscClosures.h
index e6b4957e17..3482f81338 100644
--- a/rts/include/stg/MiscClosures.h
+++ b/rts/include/stg/MiscClosures.h
@@ -389,7 +389,6 @@ RTS_FUN_DECL(stg_gc_unpt_r1);
 RTS_FUN_DECL(stg_gc_unbx_r1);
 RTS_FUN_DECL(stg_gc_f1);
 RTS_FUN_DECL(stg_gc_d1);
-RTS_FUN_DECL(stg_gc_l1);
 RTS_FUN_DECL(stg_gc_pp);
 RTS_FUN_DECL(stg_gc_ppp);
 RTS_FUN_DECL(stg_gc_pppp);
diff --git a/rts/include/stg/Regs.h b/rts/include/stg/Regs.h
index a4e6db2415..895b30586b 100644
--- a/rts/include/stg/Regs.h
+++ b/rts/include/stg/Regs.h
@@ -395,12 +395,6 @@ GLOBAL_REG_DECL(StgWord512,ZMM6,REG_ZMM6)
 #define ZMM6 (BaseReg->rZMM6)
 #endif
 
-#if defined(REG_L1) && !defined(NO_GLOBAL_REG_DECLS)
-GLOBAL_REG_DECL(StgWord64,L1,REG_L1)
-#else
-#define L1 (BaseReg->rL1)
-#endif
-
 /*
  * If BaseReg isn't mapped to a machine register, just use the global
  * address of the current register table (CurrentRegTable in
diff --git a/utils/deriveConstants/Main.hs b/utils/deriveConstants/Main.hs
index 65c3deb3e5..0b47a894d3 100644
--- a/utils/deriveConstants/Main.hs
+++ b/utils/deriveConstants/Main.hs
@@ -652,7 +652,6 @@ wanteds os = concat
           ,constantWord Haskell "MAX_Real_Float_REG"   "MAX_REAL_FLOAT_REG"
           ,constantWord Haskell "MAX_Real_Double_REG"  "MAX_REAL_DOUBLE_REG"
           ,constantWord Haskell "MAX_Real_XMM_REG"     "MAX_REAL_XMM_REG"
-          ,constantWord Haskell "MAX_Real_Long_REG"    "MAX_REAL_LONG_REG"
 
           -- This tells the native code generator the size of the spill
           -- area it has available.
diff --git a/utils/genapply/Main.hs b/utils/genapply/Main.hs
index 34d793236f..cb14634a14 100644
--- a/utils/genapply/Main.hs
+++ b/utils/genapply/Main.hs
@@ -86,20 +86,18 @@ data RegStatus = Registerised | Unregisterised
 
 type Reg = String
 
-availableRegs :: RegStatus -> ([Reg],[Reg],[Reg],[Reg])
-availableRegs Unregisterised = ([],[],[],[])
+availableRegs :: RegStatus -> ([Reg],[Reg],[Reg])
+availableRegs Unregisterised = ([],[],[])
 availableRegs Registerised =
   ( vanillaRegs MAX_REAL_VANILLA_REG,
     floatRegs   MAX_REAL_FLOAT_REG,
-    doubleRegs  MAX_REAL_DOUBLE_REG,
-    longRegs    MAX_REAL_LONG_REG
+    doubleRegs  MAX_REAL_DOUBLE_REG
   )
 
-vanillaRegs, floatRegs, doubleRegs, longRegs :: Int -> [Reg]
+vanillaRegs, floatRegs, doubleRegs :: Int -> [Reg]
 vanillaRegs n = [ "R" ++ show m | m <- [2..n] ]  -- never use R1
 floatRegs   n = [ "F" ++ show m | m <- [1..n] ]
 doubleRegs  n = [ "D" ++ show m | m <- [1..n] ]
-longRegs    n = [ "L" ++ show m | m <- [1..n] ]
 
 -- -----------------------------------------------------------------------------
 -- Loading/saving register arguments to the stack
@@ -132,16 +130,14 @@ assign sp (arg : args) regs doc
                             ((reg, sp) : doc)
     Nothing -> (doc, (arg:args), sp)
 
-findAvailableReg N (vreg:vregs, fregs, dregs, lregs) =
-  Just (vreg, (vregs,fregs,dregs,lregs))
-findAvailableReg P (vreg:vregs, fregs, dregs, lregs) =
-  Just (vreg, (vregs,fregs,dregs,lregs))
-findAvailableReg F (vregs, freg:fregs, dregs, lregs) =
-  Just (freg, (vregs,fregs,dregs,lregs))
-findAvailableReg D (vregs, fregs, dreg:dregs, lregs) =
-  Just (dreg, (vregs,fregs,dregs,lregs))
-findAvailableReg L (vregs, fregs, dregs, lreg:lregs) =
-  Just (lreg, (vregs,fregs,dregs,lregs))
+findAvailableReg N (vreg:vregs, fregs, dregs) =
+  Just (vreg, (vregs,fregs,dregs))
+findAvailableReg P (vreg:vregs, fregs, dregs) =
+  Just (vreg, (vregs,fregs,dregs))
+findAvailableReg F (vregs, freg:fregs, dregs) =
+  Just (freg, (vregs,fregs,dregs))
+findAvailableReg D (vregs, fregs, dreg:dregs) =
+  Just (dreg, (vregs,fregs,dregs))
 findAvailableReg _ _ = Nothing
 
 assign_reg_to_stk reg sp