nativeGen: Don't index into linked lists

There were a couple places where we indexed into linked lists of
register names.  Replace these with arrays.

Reviewers: austin

Subscribers: rwbarton, thomie

Differential Revision: https://phabricator.haskell.org/D3893

2 files changed, 25 insertions, 10 deletions

diff --git a/compiler/nativeGen/RegAlloc/Graph/ArchX86.hs b/compiler/nativeGen/RegAlloc/Graph/ArchX86.hs
index 439899071a..9873118dcf 100644
--- a/compiler/nativeGen/RegAlloc/Graph/ArchX86.hs
+++ b/compiler/nativeGen/RegAlloc/Graph/ArchX86.hs
@@ -14,9 +14,12 @@ module RegAlloc.Graph.ArchX86 (
         worst,
         squeese,
 ) where
+
 import RegAlloc.Graph.ArchBase  (Reg(..), RegSub(..), RegClass(..))
 import UniqSet
 
+import qualified Data.Array as A
+
 
 -- | Determine the class of a register
 classOfReg :: Reg -> RegClass
@@ -57,18 +60,28 @@ regName :: Reg -> Maybe String
 regName reg
  = case reg of
         Reg ClassG32 i
-         | i <= 7-> Just $ [ "eax", "ebx", "ecx", "edx"
-                           , "ebp", "esi", "edi", "esp" ] !! i
+         | i <= 7 ->
+           let names = A.listArray (0,8)
+                       [ "eax", "ebx", "ecx", "edx"
+                       , "ebp", "esi", "edi", "esp" ]
+           in Just $ names A.! i
 
         RegSub SubL16 (Reg ClassG32 i)
-         | i <= 7 -> Just $ [ "ax", "bx", "cx", "dx"
-                            , "bp", "si", "di", "sp"] !! i
+         | i <= 7 ->
+           let names = A.listArray (0,8)
+                       [ "ax", "bx", "cx", "dx"
+                       , "bp", "si", "di", "sp"]
+           in Just $ names A.! i
 
         RegSub SubL8  (Reg ClassG32 i)
-         | i <= 3 -> Just $ [ "al", "bl", "cl", "dl"] !! i
+         | i <= 3 ->
+           let names = A.listArray (0,4) [ "al", "bl", "cl", "dl"]
+           in Just $ names A.! i
 
         RegSub SubL8H (Reg ClassG32 i)
-         | i <= 3 -> Just $ [ "ah", "bh", "ch", "dh"] !! i
+         | i <= 3 ->
+           let names = A.listArray (0,4) [ "ah", "bh", "ch", "dh"]
+           in Just $ names A.! i
 
         _         -> Nothing
 
diff --git a/compiler/nativeGen/X86/Regs.hs b/compiler/nativeGen/X86/Regs.hs
index 4cb82ea224..8bb36ad722 100644
--- a/compiler/nativeGen/X86/Regs.hs
+++ b/compiler/nativeGen/X86/Regs.hs
@@ -58,6 +58,8 @@ import DynFlags
 import Outputable
 import Platform
 
+import qualified Data.Array as A
+
 -- | regSqueeze_class reg
 --      Calculuate the maximum number of register colors that could be
 --      denied to a node of this class due to having this reg
@@ -267,13 +269,13 @@ showReg platform n
         | n >= firstxmm  = "%xmm" ++ show (n-firstxmm)
         | n >= firstfake = "%fake" ++ show (n-firstfake)
         | n >= 8         = "%r" ++ show n
-        | otherwise      = regNames platform !! n
+        | otherwise      = regNames platform A.! n
 
-regNames :: Platform -> [String]
+regNames :: Platform -> A.Array Int String
 regNames platform
     = if target32Bit platform
-      then ["%eax", "%ebx", "%ecx", "%edx", "%esi", "%edi", "%ebp", "%esp"]
-      else ["%rax", "%rbx", "%rcx", "%rdx", "%rsi", "%rdi", "%rbp", "%rsp"]
+      then A.listArray (0,8) ["%eax", "%ebx", "%ecx", "%edx", "%esi", "%edi", "%ebp", "%esp"]
+      else A.listArray (0,8) ["%rax", "%rbx", "%rcx", "%rdx", "%rsi", "%rdi", "%rbp", "%rsp"]