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authorBen.Lippmeier@anu.edu.au <unknown>2009-02-04 04:38:02 +0000
committerBen.Lippmeier@anu.edu.au <unknown>2009-02-04 04:38:02 +0000
commit2984649a87ffad1753be0c950ed18cfc40f55fea (patch)
tree15985d0b5c0eb5e1a59d0f8acad3e69376528a48
parente8043f339e23328e3457696589edaa1ab7d60a64 (diff)
downloadhaskell-2984649a87ffad1753be0c950ed18cfc40f55fea.tar.gz
SPARC NCG: Fix some haddock problems.
-rw-r--r--compiler/nativeGen/RegAlloc/Linear/Base.hs3
-rw-r--r--compiler/nativeGen/RegAlloc/Linear/Main.hs4
-rw-r--r--compiler/nativeGen/RegAlloc/Linear/StackMap.hs7
3 files changed, 7 insertions, 7 deletions
diff --git a/compiler/nativeGen/RegAlloc/Linear/Base.hs b/compiler/nativeGen/RegAlloc/Linear/Base.hs
index a986c0ff32..3f9146cc02 100644
--- a/compiler/nativeGen/RegAlloc/Linear/Base.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/Base.hs
@@ -105,9 +105,10 @@ data RegAllocStats
data RA_State
= RA_State
+ {
-- | the current mapping from basic blocks to
-- the register assignments at the beginning of that block.
- { ra_blockassig :: BlockAssignment
+ ra_blockassig :: BlockAssignment
-- | free machine registers
, ra_freeregs :: {-#UNPACK#-}!FreeRegs
diff --git a/compiler/nativeGen/RegAlloc/Linear/Main.hs b/compiler/nativeGen/RegAlloc/Linear/Main.hs
index 46954cec75..3b1d5ca1e0 100644
--- a/compiler/nativeGen/RegAlloc/Linear/Main.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/Main.hs
@@ -247,8 +247,8 @@ linearRA
-> BlockId -- ^ id of the current block, for debugging.
-> [LiveInstr] -- ^ liveness annotated instructions in this block.
- -> RegM ( [Instr] -- ^ instructions after register allocation
- , [NatBasicBlock]) -- ^ fresh blocks of fixup code.
+ -> RegM ( [Instr] -- instructions after register allocation
+ , [NatBasicBlock]) -- fresh blocks of fixup code.
linearRA _ accInstr accFixup _ []
diff --git a/compiler/nativeGen/RegAlloc/Linear/StackMap.hs b/compiler/nativeGen/RegAlloc/Linear/StackMap.hs
index 56382aa804..56569415bb 100644
--- a/compiler/nativeGen/RegAlloc/Linear/StackMap.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/StackMap.hs
@@ -31,11 +31,10 @@ type StackSlot = Int
data StackMap
= StackMap
+ { -- | The slots that are still available to be allocated.
+ stackMapFreeSlots :: [StackSlot]
- -- | The slots that are still available to be allocated.
- { stackMapFreeSlots :: [StackSlot]
-
- -- | Assignment of vregs to stack slots.
+ -- | Assignment of vregs to stack slots.
, stackMapAssignment :: UniqFM StackSlot }