Revert "Remove ArchUnknown"

This reverts commit 2dea11a442e1d14d86fa661804de06a721943bf0.

On second thoughts, this does make sense, for unregisterised via-C
arches at least.

7 files changed, 22 insertions, 6 deletions

diff --git a/compiler/nativeGen/AsmCodeGen.lhs b/compiler/nativeGen/AsmCodeGen.lhs
index cd695e7b81..09b3bf2ec5 100644
--- a/compiler/nativeGen/AsmCodeGen.lhs
+++ b/compiler/nativeGen/AsmCodeGen.lhs
@@ -203,6 +203,8 @@ nativeCodeGen dflags h us cmms
                      panic "nativeCodeGen: No NCG for ARM"
                  ArchPPC_64 ->
                      panic "nativeCodeGen: No NCG for PPC 64"
+                 ArchUnknown ->
+                     panic "nativeCodeGen: No NCG for unknown arch"
 
 nativeCodeGen' :: (PlatformOutputable statics, PlatformOutputable instr, Instruction instr)
                => DynFlags
diff --git a/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs b/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs
index 85b5b746d7..6067f23ade 100644
--- a/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs
+++ b/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs
@@ -112,7 +112,8 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcInteger conflicts excl
                             ArchPPC     -> 16
                             ArchSPARC   -> 14
                             ArchPPC_64  -> panic "trivColorable ArchPPC_64"
-                            ArchARM _ _ -> panic "trivColorable ArchARM")
+                            ArchARM _ _ -> panic "trivColorable ArchARM"
+                            ArchUnknown -> panic "trivColorable ArchUnknown")
         , count2        <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_INTEGER
                                 (virtualRegSqueeze RcInteger)
                                 conflicts
@@ -131,7 +132,8 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcFloat conflicts exclus
                             ArchPPC     -> 0
                             ArchSPARC   -> 22
                             ArchPPC_64  -> panic "trivColorable ArchPPC_64"
-                            ArchARM _ _ -> panic "trivColorable ArchARM")
+                            ArchARM _ _ -> panic "trivColorable ArchARM"
+                            ArchUnknown -> panic "trivColorable ArchUnknown")
         , count2        <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_FLOAT
                                 (virtualRegSqueeze RcFloat)
                                 conflicts
@@ -150,7 +152,8 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcDouble conflicts exclu
                             ArchPPC     -> 26
                             ArchSPARC   -> 11
                             ArchPPC_64  -> panic "trivColorable ArchPPC_64"
-                            ArchARM _ _ -> panic "trivColorable ArchARM")
+                            ArchARM _ _ -> panic "trivColorable ArchARM"
+                            ArchUnknown -> panic "trivColorable ArchUnknown")
         , count2        <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_DOUBLE
                                 (virtualRegSqueeze RcDouble)
                                 conflicts
@@ -169,7 +172,8 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcDoubleSSE conflicts ex
                             ArchPPC     -> 0
                             ArchSPARC   -> 0
                             ArchPPC_64  -> panic "trivColorable ArchPPC_64"
-                            ArchARM _ _ -> panic "trivColorable ArchARM")
+                            ArchARM _ _ -> panic "trivColorable ArchARM"
+                            ArchUnknown -> panic "trivColorable ArchUnknown")
         , count2        <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_SSE
                                 (virtualRegSqueeze RcDoubleSSE)
                                 conflicts
diff --git a/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs b/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs
index 22fc388d0d..809e185d9b 100644
--- a/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs
@@ -67,4 +67,5 @@ maxSpillSlots platform
                 ArchSPARC   -> SPARC.Instr.maxSpillSlots
                 ArchARM _ _ -> panic "maxSpillSlots ArchARM"
                 ArchPPC_64  -> panic "maxSpillSlots ArchPPC_64"
+                ArchUnknown -> panic "maxSpillSlots ArchUnknown"
 
diff --git a/compiler/nativeGen/RegAlloc/Linear/Main.hs b/compiler/nativeGen/RegAlloc/Linear/Main.hs
index 2d6508096f..fc0bde44a0 100644
--- a/compiler/nativeGen/RegAlloc/Linear/Main.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/Main.hs
@@ -186,6 +186,7 @@ linearRegAlloc dflags first_id block_live sccs
       ArchPPC     -> linearRegAlloc' platform (frInitFreeRegs :: PPC.FreeRegs)   first_id block_live sccs
       ArchARM _ _ -> panic "linearRegAlloc ArchARM"
       ArchPPC_64  -> panic "linearRegAlloc ArchPPC_64"
+      ArchUnknown -> panic "linearRegAlloc ArchUnknown"
 
 linearRegAlloc'
         :: (FR freeRegs, PlatformOutputable instr, Instruction instr)
diff --git a/compiler/nativeGen/TargetReg.hs b/compiler/nativeGen/TargetReg.hs
index ce7b97bd86..c633182116 100644
--- a/compiler/nativeGen/TargetReg.hs
+++ b/compiler/nativeGen/TargetReg.hs
@@ -49,6 +49,7 @@ targetVirtualRegSqueeze platform
       ArchSPARC   -> SPARC.virtualRegSqueeze
       ArchPPC_64  -> panic "targetVirtualRegSqueeze ArchPPC_64"
       ArchARM _ _ -> panic "targetVirtualRegSqueeze ArchARM"
+      ArchUnknown -> panic "targetVirtualRegSqueeze ArchUnknown"
 
 targetRealRegSqueeze :: Platform -> RegClass -> RealReg -> FastInt
 targetRealRegSqueeze platform
@@ -59,6 +60,7 @@ targetRealRegSqueeze platform
       ArchSPARC   -> SPARC.realRegSqueeze
       ArchPPC_64  -> panic "targetRealRegSqueeze ArchPPC_64"
       ArchARM _ _ -> panic "targetRealRegSqueeze ArchARM"
+      ArchUnknown -> panic "targetRealRegSqueeze ArchUnknown"
 
 targetClassOfRealReg :: Platform -> RealReg -> RegClass
 targetClassOfRealReg platform
@@ -69,6 +71,7 @@ targetClassOfRealReg platform
       ArchSPARC   -> SPARC.classOfRealReg
       ArchPPC_64  -> panic "targetClassOfRealReg ArchPPC_64"
       ArchARM _ _ -> panic "targetClassOfRealReg ArchARM"
+      ArchUnknown -> panic "targetClassOfRealReg ArchUnknown"
 
 -- TODO: This should look at targetPlatform too
 targetWordSize :: Size
@@ -83,6 +86,7 @@ targetMkVirtualReg platform
       ArchSPARC   -> SPARC.mkVirtualReg
       ArchPPC_64  -> panic "targetMkVirtualReg ArchPPC_64"
       ArchARM _ _ -> panic "targetMkVirtualReg ArchARM"
+      ArchUnknown -> panic "targetMkVirtualReg ArchUnknown"
 
 targetRegDotColor :: Platform -> RealReg -> SDoc
 targetRegDotColor platform
@@ -93,6 +97,7 @@ targetRegDotColor platform
       ArchSPARC   -> SPARC.regDotColor
       ArchPPC_64  -> panic "targetRegDotColor ArchPPC_64"
       ArchARM _ _ -> panic "targetRegDotColor ArchARM"
+      ArchUnknown -> panic "targetRegDotColor ArchUnknown"
 
 
 targetClassOfReg :: Platform -> Reg -> RegClass
diff --git a/compiler/nativeGen/X86/RegInfo.hs b/compiler/nativeGen/X86/RegInfo.hs
index 8f41e8e052..36b749ffda 100644
--- a/compiler/nativeGen/X86/RegInfo.hs
+++ b/compiler/nativeGen/X86/RegInfo.hs
@@ -59,6 +59,7 @@ normalRegColors platform
                   ArchPPC_64  -> panic "X86 normalRegColors ArchPPC_64"
                   ArchSPARC   -> panic "X86 normalRegColors ArchSPARC"
                   ArchARM _ _ -> panic "X86 normalRegColors ArchARM"
+                  ArchUnknown -> panic "X86 normalRegColors ArchUnknown"
 
 fpRegColors :: [(Reg,String)]
 fpRegColors =
diff --git a/compiler/utils/Platform.hs b/compiler/utils/Platform.hs
index b4eb7aad81..7446fc1099 100644
--- a/compiler/utils/Platform.hs
+++ b/compiler/utils/Platform.hs
@@ -36,7 +36,8 @@ data Platform
 --      about what instruction set extensions an architecture might support.
 --
 data Arch
-        = ArchX86
+        = ArchUnknown
+        | ArchX86
         | ArchX86_64
         | ArchPPC
         | ArchPPC_64
@@ -76,6 +77,7 @@ data ArmISAExt
 
 target32Bit :: Platform -> Bool
 target32Bit p = case platformArch p of
+                ArchUnknown -> panic "Don't know if ArchUnknown is 32bit"
                 ArchX86     -> True
                 ArchX86_64  -> False
                 ArchPPC     -> True
@@ -116,7 +118,7 @@ defaultTargetArch       = ArchSPARC
 #elif arm_TARGET_ARCH
 defaultTargetArch       = ArchARM defaultTargetArmISA defaultTargetArmISAExt
 #else
-#error Unknown Arch
+defaultTargetArch       = ArchUnknown
 #endif