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authorDai <daig@users.noreply.github.com>2022-10-14 13:07:43 +0200
committerMarge Bot <ben+marge-bot@smart-cactus.org>2022-10-19 10:45:45 -0400
commit5b3a992f5d166007c3c5a22f120ed08e0a27f01a (patch)
tree4da760b794be76a6298acefa62e3be4c61b3794e /compiler/GHC/Cmm
parent99dc3e3d76daab80a5c5209a3e0c44c9e4664e06 (diff)
downloadhaskell-5b3a992f5d166007c3c5a22f120ed08e0a27f01a.tar.gz
Add VecSlot for unboxed sums of SIMD vectors
This patch adds the missing `VecRep` case to `primRepSlot` function and all the necessary machinery to carry this new `VecSlot` through code generation. This allows programs involving unboxed sums of SIMD vectors to be written and compiled. Fixes #22187
Diffstat (limited to 'compiler/GHC/Cmm')
-rw-r--r--compiler/GHC/Cmm/Utils.hs3
1 files changed, 2 insertions, 1 deletions
diff --git a/compiler/GHC/Cmm/Utils.hs b/compiler/GHC/Cmm/Utils.hs
index 3671366d07..7524ba7c5e 100644
--- a/compiler/GHC/Cmm/Utils.hs
+++ b/compiler/GHC/Cmm/Utils.hs
@@ -113,7 +113,7 @@ primRepCmmType platform = \case
AddrRep -> bWord platform
FloatRep -> f32
DoubleRep -> f64
- (VecRep len rep) -> vec len (primElemRepCmmType rep)
+ VecRep len rep -> vec len (primElemRepCmmType rep)
slotCmmType :: Platform -> SlotTy -> CmmType
slotCmmType platform = \case
@@ -123,6 +123,7 @@ slotCmmType platform = \case
Word64Slot -> b64
FloatSlot -> f32
DoubleSlot -> f64
+ VecSlot l e -> vec l (primElemRepCmmType e)
primElemRepCmmType :: PrimElemRep -> CmmType
primElemRepCmmType Int8ElemRep = b8