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authorKrzysztof Gogolewski <krzysztof.gogolewski@tweag.io>2022-09-14 16:23:48 +0200
committerMarge Bot <ben+marge-bot@smart-cactus.org>2022-09-14 22:40:09 -0400
commitdf04d6ec6a543d8bf1b953cf27c26e63ec6aab25 (patch)
treee3a3e88e10b4da7e57e73755147dd7928710ff17 /compiler/GHC/Cmm
parentbdd61cd63dff07a78b1364988b5a140806f79e38 (diff)
downloadhaskell-df04d6ec6a543d8bf1b953cf27c26e63ec6aab25.tar.gz
Fix typos
Diffstat (limited to 'compiler/GHC/Cmm')
-rw-r--r--compiler/GHC/Cmm/Reg.hs2
1 files changed, 1 insertions, 1 deletions
diff --git a/compiler/GHC/Cmm/Reg.hs b/compiler/GHC/Cmm/Reg.hs
index a37e5ce6f8..6c94ecb2eb 100644
--- a/compiler/GHC/Cmm/Reg.hs
+++ b/compiler/GHC/Cmm/Reg.hs
@@ -352,7 +352,7 @@ globalRegType platform = \case
(LongReg _) -> cmmBits W64
-- TODO: improve the internal model of SIMD/vectorized registers
-- the right design SHOULd improve handling of float and double code too.
- -- see remarks in "NOTE [SIMD Design for the future]"" in GHC.StgToCmm.Prim
+ -- see remarks in Note [SIMD Design for the future] in GHC.StgToCmm.Prim
(XmmReg _) -> cmmVec 4 (cmmBits W32)
(YmmReg _) -> cmmVec 8 (cmmBits W32)
(ZmmReg _) -> cmmVec 16 (cmmBits W32)