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authorMoritz Angermann <moritz.angermann@gmail.com>2020-10-22 12:08:34 +0800
committerMarge Bot <ben+marge-bot@smart-cactus.org>2021-06-05 10:29:57 -0400
commit3b1aa7dba7c006b473855a6b199b15fa3a3d77a0 (patch)
tree631816f4aef8d28ee596b51b70a0a0ba2df12230 /compiler/GHC/CmmToAsm/X86
parent8c90e6c758769b068aea2891b26cc17577b6d36a (diff)
downloadhaskell-3b1aa7dba7c006b473855a6b199b15fa3a3d77a0.tar.gz
Adds AArch64 Native Code Generator
In which we add a new code generator to the Glasgow Haskell Compiler. This codegen supports ELF and Mach-O targets, thus covering Linux, macOS, and BSDs in principle. It was tested only on macOS and Linux. The NCG follows a similar structure as the other native code generators we already have, and should therfore be realtively easy to follow. It supports most of the features required for a proper native code generator, but does not claim to be perfect or fully optimised. There are still opportunities for optimisations. Metric Decrease: ManyAlternatives ManyConstructors MultiLayerModules PmSeriesG PmSeriesS PmSeriesT PmSeriesV T10421 T10421a T10858 T11195 T11276 T11303b T11374 T11822 T12227 T12545 T12707 T13035 T13253 T13253-spj T13379 T13701 T13719 T14683 T14697 T15164 T15630 T16577 T17096 T17516 T17836 T17836b T17977 T17977b T18140 T18282 T18304 T18478 T18698a T18698b T18923 T1969 T3064 T5030 T5321FD T5321Fun T5631 T5642 T5837 T783 T9198 T9233 T9630 T9872d T9961 WWRec Metric Increase: T4801
Diffstat (limited to 'compiler/GHC/CmmToAsm/X86')
-rw-r--r--compiler/GHC/CmmToAsm/X86/Instr.hs18
1 files changed, 9 insertions, 9 deletions
diff --git a/compiler/GHC/CmmToAsm/X86/Instr.hs b/compiler/GHC/CmmToAsm/X86/Instr.hs
index e48d0922d8..9410537ed8 100644
--- a/compiler/GHC/CmmToAsm/X86/Instr.hs
+++ b/compiler/GHC/CmmToAsm/X86/Instr.hs
@@ -672,15 +672,15 @@ mkSpillInstr
-> Reg -- register to spill
-> Int -- current stack delta
-> Int -- spill slot to use
- -> Instr
+ -> [Instr]
mkSpillInstr config reg delta slot
= let off = spillSlotToOffset platform slot - delta
in
case targetClassOfReg platform reg of
- RcInteger -> MOV (archWordFormat is32Bit)
- (OpReg reg) (OpAddr (spRel platform off))
- RcDouble -> MOV FF64 (OpReg reg) (OpAddr (spRel platform off))
+ RcInteger -> [MOV (archWordFormat is32Bit)
+ (OpReg reg) (OpAddr (spRel platform off))]
+ RcDouble -> [MOV FF64 (OpReg reg) (OpAddr (spRel platform off))]
_ -> panic "X86.mkSpillInstr: no match"
where platform = ncgPlatform config
is32Bit = target32Bit platform
@@ -691,16 +691,16 @@ mkLoadInstr
-> Reg -- register to load
-> Int -- current stack delta
-> Int -- spill slot to use
- -> Instr
+ -> [Instr]
mkLoadInstr config reg delta slot
= let off = spillSlotToOffset platform slot - delta
in
case targetClassOfReg platform reg of
- RcInteger -> MOV (archWordFormat is32Bit)
- (OpAddr (spRel platform off)) (OpReg reg)
- RcDouble -> MOV FF64 (OpAddr (spRel platform off)) (OpReg reg)
- _ -> panic "X86.mkLoadInstr"
+ RcInteger -> ([MOV (archWordFormat is32Bit)
+ (OpAddr (spRel platform off)) (OpReg reg)])
+ RcDouble -> ([MOV FF64 (OpAddr (spRel platform off)) (OpReg reg)])
+ _ -> panic "X86.mkLoadInstr"
where platform = ncgPlatform config
is32Bit = target32Bit platform