diff options
author | Andreas Klebinger <klebinger.andreas@gmx.at> | 2021-07-19 18:12:44 +0200 |
---|---|---|
committer | Marge Bot <ben+marge-bot@smart-cactus.org> | 2021-09-30 19:42:54 -0400 |
commit | ef92a0095cee1f623fba1c285c1836e80bf16223 (patch) | |
tree | b7a7d9c5b179bbf3cbd28877672ecc70387b1734 /compiler/GHC/CmmToAsm | |
parent | 94f3ce7e4a4e0c952687eef511aa68cc38b1ad0d (diff) | |
download | haskell-ef92a0095cee1f623fba1c285c1836e80bf16223.tar.gz |
NCG: Linear-reg-alloc: A few small implemenation tweaks.
Removed an intermediate list via a fold.
realRegsAlias: Manually inlined the list functions to get better code.
Linear.hs added a bang somewhere.
Diffstat (limited to 'compiler/GHC/CmmToAsm')
-rw-r--r-- | compiler/GHC/CmmToAsm/Reg/Linear.hs | 40 |
1 files changed, 21 insertions, 19 deletions
diff --git a/compiler/GHC/CmmToAsm/Reg/Linear.hs b/compiler/GHC/CmmToAsm/Reg/Linear.hs index a9a4545f62..021c909a52 100644 --- a/compiler/GHC/CmmToAsm/Reg/Linear.hs +++ b/compiler/GHC/CmmToAsm/Reg/Linear.hs @@ -677,29 +677,30 @@ saveClobberedTemps [] _ saveClobberedTemps clobbered dying = do assig <- getAssigR :: RegM freeRegs (UniqFM Reg Loc) - -- Unique represents the VirtualReg - let to_spill :: [(Unique, RealReg)] - to_spill - = [ (temp,reg) - | (temp, InReg reg) <- nonDetUFMToList assig - -- This is non-deterministic but we do not - -- currently support deterministic code-generation. - -- See Note [Unique Determinism and code generation] - , any (realRegsAlias reg) clobbered - , temp `notElem` map getUnique dying ] - - (instrs,assig') <- clobber assig [] to_spill + (assig',instrs) <- nonDetStrictFoldUFM_DirectlyM maybe_spill (assig,[]) assig setAssigR assig' return $ -- mkComment (text "<saveClobberedTemps>") ++ instrs -- ++ mkComment (text "</saveClobberedTemps>") where - -- See Note [UniqFM and the register allocator] - clobber :: RegMap Loc -> [instr] -> [(Unique,RealReg)] -> RegM freeRegs ([instr], RegMap Loc) - clobber assig instrs [] - = return (instrs, assig) + -- Unique represents the VirtualReg + -- Here we separate the cases which we do want to spill from these we don't. + maybe_spill :: Unique -> (RegMap Loc,[instr]) -> (Loc) -> RegM freeRegs (RegMap Loc,[instr]) + maybe_spill !temp !(assig,instrs) !loc = + case loc of + -- This is non-deterministic but we do not + -- currently support deterministic code-generation. + -- See Note [Unique Determinism and code generation] + InReg reg + | any (realRegsAlias reg) clobbered + , temp `notElem` map getUnique dying + -> clobber temp (assig,instrs) (reg) + _ -> return (assig,instrs) - clobber assig instrs ((temp, reg) : rest) + + -- See Note [UniqFM and the register allocator] + clobber :: Unique -> (RegMap Loc,[instr]) -> (RealReg) -> RegM freeRegs (RegMap Loc,[instr]) + clobber temp (assig,instrs) (reg) = do platform <- getPlatform freeRegs <- getFreeRegsR @@ -718,7 +719,7 @@ saveClobberedTemps clobbered dying let instr = mkRegRegMoveInstr platform (RegReal reg) (RegReal my_reg) - clobber new_assign (instr : instrs) rest + return (new_assign,(instr : instrs)) -- (2) no free registers: spill the value [] -> do @@ -729,7 +730,8 @@ saveClobberedTemps clobbered dying let new_assign = addToUFM_Directly assig temp (InBoth reg slot) - clobber new_assign (spill ++ instrs) rest + return (new_assign, (spill ++ instrs)) + |