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author | Geoffrey Mainland <gmainlan@microsoft.com> | 2012-10-31 15:42:01 +0000 |
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committer | Geoffrey Mainland <gmainlan@microsoft.com> | 2013-02-01 22:00:24 +0000 |
commit | 33bfc6a700eaab9bc06974d6f71a80e61d9177c9 (patch) | |
tree | 842bf82b7dbdafe04820349e5e991800a3cf0646 /compiler/cmm/PprC.hs | |
parent | 1811440833da92eefd7b7255915855fddc64994c (diff) | |
download | haskell-33bfc6a700eaab9bc06974d6f71a80e61d9177c9.tar.gz |
Add support for passing SSE vectors in registers.
This patch adds support for 6 XMM registers on x86-64 which overlap with the F
and D registers and may hold 128-bit wide SIMD vectors. Because there is not a
good way to attach type information to STG registers, we aggressively bitcast in
the LLVM back-end.
Diffstat (limited to 'compiler/cmm/PprC.hs')
-rw-r--r-- | compiler/cmm/PprC.hs | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/compiler/cmm/PprC.hs b/compiler/cmm/PprC.hs index 8712d5fb5c..cda68ef39e 100644 --- a/compiler/cmm/PprC.hs +++ b/compiler/cmm/PprC.hs @@ -661,6 +661,15 @@ pprMachOp_for_C mop = case mop of (panic $ "PprC.pprMachOp_for_C: MO_VS_Neg" ++ " should have been handled earlier!") + MO_VF_Insert {} -> pprTrace "offending mop:" + (ptext $ sLit "MO_VF_Insert") + (panic $ "PprC.pprMachOp_for_C: MO_VF_Insert" + ++ " should have been handled earlier!") + MO_VF_Extract {} -> pprTrace "offending mop:" + (ptext $ sLit "MO_VF_Extract") + (panic $ "PprC.pprMachOp_for_C: MO_VF_Extract" + ++ " should have been handled earlier!") + MO_VF_Add {} -> pprTrace "offending mop:" (ptext $ sLit "MO_VF_Add") (panic $ "PprC.pprMachOp_for_C: MO_VF_Add" |