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authorBen Gamari <ben@smart-cactus.org>2019-07-09 14:49:32 -0400
committerMarge Bot <ben+marge-bot@smart-cactus.org>2019-07-16 02:40:43 -0400
commitdb948daea6c01c073f8d09a79fa5adda279fbf0c (patch)
tree50fdb60bdd06a12dab101bf4fca3358fec0ad43d /compiler/codeGen/StgCmmPrim.hs
parent5728d9faafe410d1e0c3a070bb8882721470b798 (diff)
downloadhaskell-db948daea6c01c073f8d09a79fa5adda279fbf0c.tar.gz
Revert "Add support for SIMD operations in the NCG"
Unfortunately this will require more work; register allocation is quite broken. This reverts commit acd795583625401c5554f8e04ec7efca18814011.
Diffstat (limited to 'compiler/codeGen/StgCmmPrim.hs')
-rw-r--r--compiler/codeGen/StgCmmPrim.hs55
1 files changed, 12 insertions, 43 deletions
diff --git a/compiler/codeGen/StgCmmPrim.hs b/compiler/codeGen/StgCmmPrim.hs
index 9a6cf6c2e5..c3f9d5a279 100644
--- a/compiler/codeGen/StgCmmPrim.hs
+++ b/compiler/codeGen/StgCmmPrim.hs
@@ -669,7 +669,7 @@ emitPrimOp _ [res] Word2DoubleOp [w] = emitPrimCall [res]
-- SIMD primops
emitPrimOp dflags [res] (VecBroadcastOp vcat n w) [e] = do
checkVecCompatibility dflags vcat n w
- doVecBroadcastOp (vecElemInjectCast dflags vcat w) ty zeros e res
+ doVecPackOp (vecElemInjectCast dflags vcat w) ty zeros (replicate n e) res
where
zeros :: CmmExpr
zeros = CmmLit $ CmmVec (replicate n zero)
@@ -1765,8 +1765,9 @@ vecElemProjectCast _ _ _ = Nothing
checkVecCompatibility :: DynFlags -> PrimOpVecCat -> Length -> Width -> FCode ()
checkVecCompatibility dflags vcat l w = do
- when (hscTarget dflags /= HscLlvm && hscTarget dflags /= HscAsm) $ do
- sorry "SIMD vector instructions not supported for the C backend or GHCi"
+ when (hscTarget dflags /= HscLlvm) $ do
+ sorry $ unlines ["SIMD vector instructions require the LLVM back-end."
+ ,"Please use -fllvm."]
check vecWidth vcat l w
where
check :: Width -> PrimOpVecCat -> Length -> Width -> FCode ()
@@ -1791,38 +1792,6 @@ checkVecCompatibility dflags vcat l w = do
------------------------------------------------------------------------------
-- Helpers for translating vector packing and unpacking.
-doVecBroadcastOp :: Maybe MachOp -- Cast from element to vector component
- -> CmmType -- Type of vector
- -> CmmExpr -- Initial vector
- -> CmmExpr -- Elements
- -> CmmFormal -- Destination for result
- -> FCode ()
-doVecBroadcastOp maybe_pre_write_cast ty z es res = do
- dst <- newTemp ty
- emitAssign (CmmLocal dst) z
- vecBroadcast dst es 0
- where
- vecBroadcast :: CmmFormal -> CmmExpr -> Int -> FCode ()
- vecBroadcast src e _ = do
- dst <- newTemp ty
- if isFloatType (vecElemType ty)
- then emitAssign (CmmLocal dst) (CmmMachOp (MO_VF_Broadcast len wid)
- [CmmReg (CmmLocal src), cast e])
- --TODO : Add the MachOp MO_V_Broadcast
- else emitAssign (CmmLocal dst) (CmmMachOp (MO_V_Insert len wid)
- [CmmReg (CmmLocal src), cast e])
- emitAssign (CmmLocal res) (CmmReg (CmmLocal dst))
-
- cast :: CmmExpr -> CmmExpr
- cast val = case maybe_pre_write_cast of
- Nothing -> val
- Just cast -> CmmMachOp cast [val]
-
- len :: Length
- len = vecLength ty
-
- wid :: Width
- wid = typeWidth (vecElemType ty)
doVecPackOp :: Maybe MachOp -- Cast from element to vector component
-> CmmType -- Type of vector
@@ -1840,16 +1809,16 @@ doVecPackOp maybe_pre_write_cast ty z es res = do
emitAssign (CmmLocal res) (CmmReg (CmmLocal src))
vecPack src (e : es) i = do
- dst <- newTemp ty
- if isFloatType (vecElemType ty)
- then emitAssign (CmmLocal dst) (CmmMachOp (MO_VF_Insert len wid)
- [CmmReg (CmmLocal src), cast e, iLit])
- else emitAssign (CmmLocal dst) (CmmMachOp (MO_V_Insert len wid)
- [CmmReg (CmmLocal src), cast e, iLit])
- vecPack dst es (i + 1)
+ dst <- newTemp ty
+ if isFloatType (vecElemType ty)
+ then emitAssign (CmmLocal dst) (CmmMachOp (MO_VF_Insert len wid)
+ [CmmReg (CmmLocal src), cast e, iLit])
+ else emitAssign (CmmLocal dst) (CmmMachOp (MO_V_Insert len wid)
+ [CmmReg (CmmLocal src), cast e, iLit])
+ vecPack dst es (i + 1)
where
-- vector indices are always 32-bits
- iLit = CmmLit (CmmInt ((toInteger i) * 16) W32)
+ iLit = CmmLit (CmmInt (toInteger i) W32)
cast :: CmmExpr -> CmmExpr
cast val = case maybe_pre_write_cast of