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| author | Ben Gamari <ben@smart-cactus.org> | 2018-10-09 12:39:14 -0400 |
|---|---|---|
| committer | Ben Gamari <ben@smart-cactus.org> | 2018-10-09 12:40:23 -0400 |
| commit | d728c3c578cc9e9205def2c1e96934487b364b7b (patch) | |
| tree | c542d0ea89dad09c0b8a887266375e4303f9a3a6 /compiler/llvmGen/LlvmCodeGen/CodeGen.hs | |
| parent | 4eeeb51d5f51083d0ae393009a7fd246223e9791 (diff) | |
| download | haskell-d728c3c578cc9e9205def2c1e96934487b364b7b.tar.gz | |
Revert "Add Int8# and Word8#"
This unfortunately broke i386 support since it introduced references to
byte-sized registers that don't exist on that architecture.
Reverts binary submodule
This reverts commit 5d5307f943d7581d7013ffe20af22233273fba06.
Diffstat (limited to 'compiler/llvmGen/LlvmCodeGen/CodeGen.hs')
| -rw-r--r-- | compiler/llvmGen/LlvmCodeGen/CodeGen.hs | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/compiler/llvmGen/LlvmCodeGen/CodeGen.hs b/compiler/llvmGen/LlvmCodeGen/CodeGen.hs index 636751b6bf..18734009c6 100644 --- a/compiler/llvmGen/LlvmCodeGen/CodeGen.hs +++ b/compiler/llvmGen/LlvmCodeGen/CodeGen.hs @@ -1193,9 +1193,6 @@ genMachOp _ op [x] = case op of MO_UU_Conv from to -> sameConv from (widthToLlvmInt to) LM_Trunc LM_Zext - MO_XX_Conv from to - -> sameConv from (widthToLlvmInt to) LM_Bitcast LM_Bitcast - MO_FF_Conv from to -> sameConv from (widthToLlvmFloat to) LM_Fptrunc LM_Fpext @@ -1457,7 +1454,6 @@ genMachOp_slow opt op [x, y] = case op of MO_FS_Conv _ _ -> panicOp MO_SS_Conv _ _ -> panicOp MO_UU_Conv _ _ -> panicOp - MO_XX_Conv _ _ -> panicOp MO_FF_Conv _ _ -> panicOp MO_V_Insert {} -> panicOp |