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authorBen Gamari <ben@smart-cactus.org>2019-07-09 14:49:32 -0400
committerMarge Bot <ben+marge-bot@smart-cactus.org>2019-07-16 02:40:43 -0400
commitdb948daea6c01c073f8d09a79fa5adda279fbf0c (patch)
tree50fdb60bdd06a12dab101bf4fca3358fec0ad43d /compiler/main
parent5728d9faafe410d1e0c3a070bb8882721470b798 (diff)
downloadhaskell-db948daea6c01c073f8d09a79fa5adda279fbf0c.tar.gz
Revert "Add support for SIMD operations in the NCG"
Unfortunately this will require more work; register allocation is quite broken. This reverts commit acd795583625401c5554f8e04ec7efca18814011.
Diffstat (limited to 'compiler/main')
-rw-r--r--compiler/main/DynFlags.hs3
1 files changed, 0 insertions, 3 deletions
diff --git a/compiler/main/DynFlags.hs b/compiler/main/DynFlags.hs
index 2315be3519..1f7de170a9 100644
--- a/compiler/main/DynFlags.hs
+++ b/compiler/main/DynFlags.hs
@@ -219,7 +219,6 @@ module DynFlags (
-- * SSE and AVX
isSseEnabled,
isSse2Enabled,
- isSse4_1Enabled,
isSse4_2Enabled,
isBmiEnabled,
isBmi2Enabled,
@@ -5903,8 +5902,6 @@ isSse2Enabled dflags = case platformArch (targetPlatform dflags) of
ArchX86 -> True
_ -> False
-isSse4_1Enabled :: DynFlags -> Bool
-isSse4_1Enabled dflags = sseVersion dflags >= Just SSE4
isSse4_2Enabled :: DynFlags -> Bool
isSse4_2Enabled dflags = sseVersion dflags >= Just SSE42