diff options
| author | Ryan Scott <ryan.gl.scott@gmail.com> | 2019-03-12 18:15:38 -0400 |
|---|---|---|
| committer | Marge Bot <ben+marge-bot@smart-cactus.org> | 2019-03-15 10:17:54 -0400 |
| commit | 610ec224a49e092c802a336570fd9613ea15ef3c (patch) | |
| tree | cc79ac561669b51099eb37f222e8179d48a54d59 /compiler/nativeGen/PPC/Ppr.hs | |
| parent | afc80730fd235f5c5b2d0b9fc5a10c16ef9865f6 (diff) | |
| download | haskell-610ec224a49e092c802a336570fd9613ea15ef3c.tar.gz | |
Update Trac ticket URLs to point to GitLab
This moves all URL references to Trac tickets to their corresponding
GitLab counterparts.
Diffstat (limited to 'compiler/nativeGen/PPC/Ppr.hs')
| -rw-r--r-- | compiler/nativeGen/PPC/Ppr.hs | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/compiler/nativeGen/PPC/Ppr.hs b/compiler/nativeGen/PPC/Ppr.hs index c9d5c2df18..c4eb0811bd 100644 --- a/compiler/nativeGen/PPC/Ppr.hs +++ b/compiler/nativeGen/PPC/Ppr.hs @@ -754,12 +754,12 @@ pprInstr (SR II32 reg1 reg2 (RIImm (ImmInt i))) | i < 0 || i > 31 = -- Handle the case where we are asked to shift a 32 bit register by -- less than zero or more than 31 bits. We convert this into a clear -- of the destination register. - -- Fixes ticket http://ghc.haskell.org/trac/ghc/ticket/5900 + -- Fixes ticket https://gitlab.haskell.org/ghc/ghc/issues/5900 pprInstr (XOR reg1 reg2 (RIReg reg2)) pprInstr (SL II32 reg1 reg2 (RIImm (ImmInt i))) | i < 0 || i > 31 = -- As above for SR, but for left shifts. - -- Fixes ticket http://ghc.haskell.org/trac/ghc/ticket/10870 + -- Fixes ticket https://gitlab.haskell.org/ghc/ghc/issues/10870 pprInstr (XOR reg1 reg2 (RIReg reg2)) pprInstr (SRA II32 reg1 reg2 (RIImm (ImmInt i))) | i > 31 = |