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| author | Simon Marlow <marlowsd@gmail.com> | 2013-09-23 16:03:44 +0100 |
|---|---|---|
| committer | Simon Marlow <marlowsd@gmail.com> | 2013-10-01 11:45:46 +0100 |
| commit | 2f69aaea7066b8d11034925d9376fadd67361eca (patch) | |
| tree | 384711303663047480f88d727a3b5fa3ed90e8d3 /compiler/nativeGen/PPC/Ppr.hs | |
| parent | 0b0fec536e35769b64b8bc5397c84138fa512155 (diff) | |
| download | haskell-2f69aaea7066b8d11034925d9376fadd67361eca.tar.gz | |
Globally replace "hackage.haskell.org" with "ghc.haskell.org"
Diffstat (limited to 'compiler/nativeGen/PPC/Ppr.hs')
| -rw-r--r-- | compiler/nativeGen/PPC/Ppr.hs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/compiler/nativeGen/PPC/Ppr.hs b/compiler/nativeGen/PPC/Ppr.hs index cbeabdd8a9..8fe8276635 100644 --- a/compiler/nativeGen/PPC/Ppr.hs +++ b/compiler/nativeGen/PPC/Ppr.hs @@ -606,7 +606,7 @@ pprInstr (SRW reg1 reg2 (RIImm (ImmInt i))) | i > 31 || i < 0 = -- Handle the case where we are asked to shift a 32 bit register by -- less than zero or more than 31 bits. We convert this into a clear -- of the destination register. - -- Fixes ticket http://hackage.haskell.org/trac/ghc/ticket/5900 + -- Fixes ticket http://ghc.haskell.org/trac/ghc/ticket/5900 pprInstr (XOR reg1 reg2 (RIReg reg2)) pprInstr (SRW reg1 reg2 ri) = pprLogic (sLit "srw") reg1 reg2 (limitShiftRI ri) |