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| author | Ben.Lippmeier@anu.edu.au <unknown> | 2009-01-20 05:21:13 +0000 |
|---|---|---|
| committer | Ben.Lippmeier@anu.edu.au <unknown> | 2009-01-20 05:21:13 +0000 |
| commit | 0df5099f0c2088e2ccbb5b8974a7eae4d77eaa1c (patch) | |
| tree | b580fa732ad5f534a283725a5b6998eb07f718c2 /compiler/nativeGen/PprMach.hs | |
| parent | c6e9a86f03efb4fdef5ed10fcb93b64439fdec60 (diff) | |
| download | haskell-0df5099f0c2088e2ccbb5b8974a7eae4d77eaa1c.tar.gz | |
SPARC NCG: Add support for hardware divide
Diffstat (limited to 'compiler/nativeGen/PprMach.hs')
| -rw-r--r-- | compiler/nativeGen/PprMach.hs | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/compiler/nativeGen/PprMach.hs b/compiler/nativeGen/PprMach.hs index eb880fca6a..199fd36498 100644 --- a/compiler/nativeGen/PprMach.hs +++ b/compiler/nativeGen/PprMach.hs @@ -2002,9 +2002,19 @@ pprInstr (SLL reg1 ri reg2) = pprRegRIReg (sLit "sll") False reg1 ri reg2 pprInstr (SRL reg1 ri reg2) = pprRegRIReg (sLit "srl") False reg1 ri reg2 pprInstr (SRA reg1 ri reg2) = pprRegRIReg (sLit "sra") False reg1 ri reg2 -pprInstr (RDY rd) = ptext (sLit "\trd\t%y,") <> pprReg rd -pprInstr (SMUL b reg1 ri reg2) = pprRegRIReg (sLit "smul") b reg1 ri reg2 -pprInstr (UMUL b reg1 ri reg2) = pprRegRIReg (sLit "umul") b reg1 ri reg2 +pprInstr (RDY rd) = ptext (sLit "\trd\t%y,") <> pprReg rd +pprInstr (WRY reg1 reg2) + = ptext (sLit "\twr\t") + <> pprReg reg1 + <> char ',' + <> pprReg reg2 + <> char ',' + <> ptext (sLit "%y") + +pprInstr (SMUL b reg1 ri reg2) = pprRegRIReg (sLit "smul") b reg1 ri reg2 +pprInstr (UMUL b reg1 ri reg2) = pprRegRIReg (sLit "umul") b reg1 ri reg2 +pprInstr (SDIV b reg1 ri reg2) = pprRegRIReg (sLit "sdiv") b reg1 ri reg2 +pprInstr (UDIV b reg1 ri reg2) = pprRegRIReg (sLit "udiv") b reg1 ri reg2 pprInstr (SETHI imm reg) = hcat [ |