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author | Simon Marlow <marlowsd@gmail.com> | 2012-07-06 13:20:44 +0100 |
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committer | Simon Marlow <marlowsd@gmail.com> | 2012-07-06 16:49:58 +0100 |
commit | b5c84a16f4f92a486c63d90d0d00796c884b361c (patch) | |
tree | 3f771dedec82e10aecb387f311159465bccf57b9 /compiler/nativeGen/RegAlloc | |
parent | 147b54230624617ef7c3056b627053ce9a0a80e9 (diff) | |
download | haskell-b5c84a16f4f92a486c63d90d0d00796c884b361c.tar.gz |
bugfix: coalescing moves from RealReg to VirtualReg got broken at some point
Diffstat (limited to 'compiler/nativeGen/RegAlloc')
-rw-r--r-- | compiler/nativeGen/RegAlloc/Linear/Main.hs | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/compiler/nativeGen/RegAlloc/Linear/Main.hs b/compiler/nativeGen/RegAlloc/Linear/Main.hs index 8c38fd1de6..b2da1f930e 100644 --- a/compiler/nativeGen/RegAlloc/Linear/Main.hs +++ b/compiler/nativeGen/RegAlloc/Linear/Main.hs @@ -385,7 +385,7 @@ raInsn platform block_live new_instrs id (LiveInstr (Instr instr) (Just live)) Just (src,dst) | src `elementOfUniqSet` (liveDieRead live), isVirtualReg dst, not (dst `elemUFM` assig), - Just (InReg _) <- (lookupUFM assig src) -> do + isRealReg src || isInReg src assig -> do case src of (RegReal rr) -> setAssigR (addToUFM assig dst (InReg rr)) -- if src is a fixed reg, then we just map dest to this @@ -414,6 +414,11 @@ raInsn _ _ _ _ instr = pprPanic "raInsn" (text "no match for:" <> ppr instr) +isInReg :: Reg -> RegMap Loc -> Bool +isInReg src assig | Just (InReg _) <- lookupUFM assig src = True + | otherwise = False + + genRaInsn :: (FR freeRegs, Instruction instr, Outputable instr) => Platform -> BlockMap RegSet |