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author | Ben Gamari <ben@smart-cactus.org> | 2019-07-09 14:49:32 -0400 |
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committer | Marge Bot <ben+marge-bot@smart-cactus.org> | 2019-07-16 02:40:43 -0400 |
commit | db948daea6c01c073f8d09a79fa5adda279fbf0c (patch) | |
tree | 50fdb60bdd06a12dab101bf4fca3358fec0ad43d /compiler/nativeGen/SPARC/Ppr.hs | |
parent | 5728d9faafe410d1e0c3a070bb8882721470b798 (diff) | |
download | haskell-db948daea6c01c073f8d09a79fa5adda279fbf0c.tar.gz |
Revert "Add support for SIMD operations in the NCG"
Unfortunately this will require more work; register allocation is
quite broken.
This reverts commit acd795583625401c5554f8e04ec7efca18814011.
Diffstat (limited to 'compiler/nativeGen/SPARC/Ppr.hs')
-rw-r--r-- | compiler/nativeGen/SPARC/Ppr.hs | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/compiler/nativeGen/SPARC/Ppr.hs b/compiler/nativeGen/SPARC/Ppr.hs index aa355f97cb..fc67f77541 100644 --- a/compiler/nativeGen/SPARC/Ppr.hs +++ b/compiler/nativeGen/SPARC/Ppr.hs @@ -45,6 +45,7 @@ import CLabel import Hoopl.Label import Hoopl.Collections +import Unique ( pprUniqueAlways ) import Outputable import GHC.Platform import FastString @@ -147,7 +148,12 @@ pprReg :: Reg -> SDoc pprReg reg = case reg of RegVirtual vr - -> ppr vr + -> case vr of + VirtualRegI u -> text "%vI_" <> pprUniqueAlways u + VirtualRegHi u -> text "%vHi_" <> pprUniqueAlways u + VirtualRegF u -> text "%vF_" <> pprUniqueAlways u + VirtualRegD u -> text "%vD_" <> pprUniqueAlways u + RegReal rr -> case rr of @@ -215,8 +221,7 @@ pprFormat x II32 -> sLit "" II64 -> sLit "d" FF32 -> sLit "" - FF64 -> sLit "d" - VecFormat _ _ _ -> panic "SPARC.Ppr.pprFormat: VecFormat") + FF64 -> sLit "d") -- | Pretty print a format for an instruction suffix. @@ -230,8 +235,7 @@ pprStFormat x II32 -> sLit "" II64 -> sLit "x" FF32 -> sLit "" - FF64 -> sLit "d" - VecFormat _ _ _ -> panic "SPARC.Ppr.pprFormat: VecFormat") + FF64 -> sLit "d") |