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authorBen Gamari <ben@smart-cactus.org>2017-11-22 14:27:55 -0500
committerBen Gamari <ben@smart-cactus.org>2017-11-22 14:27:55 -0500
commit341013e24764cb7fc95169fddcda1bdb02434bb6 (patch)
treee77842663394b0c3cfdd5a1cd04e24d94590edcf /compiler/nativeGen/X86/CodeGen.hs
parentabdb5559b74af003a6d85f32695c034ff739f508 (diff)
downloadhaskell-341013e24764cb7fc95169fddcda1bdb02434bb6.tar.gz
Revert "Add new mbmi and mbmi2 compiler flags"
This broke the 32-bit build. This reverts commit f5dc8ccc29429d0a1d011f62b6b430f6ae50290c.
Diffstat (limited to 'compiler/nativeGen/X86/CodeGen.hs')
-rw-r--r--compiler/nativeGen/X86/CodeGen.hs69
1 files changed, 0 insertions, 69 deletions
diff --git a/compiler/nativeGen/X86/CodeGen.hs b/compiler/nativeGen/X86/CodeGen.hs
index 62ed72163d..6c0e0ac783 100644
--- a/compiler/nativeGen/X86/CodeGen.hs
+++ b/compiler/nativeGen/X86/CodeGen.hs
@@ -1872,72 +1872,6 @@ genCCall dflags is32Bit (PrimTarget (MO_PopCnt width)) dest_regs@[dst]
format = intFormat width
lbl = mkCmmCodeLabel primUnitId (fsLit (popCntLabel width))
-genCCall dflags is32Bit (PrimTarget (MO_Pdep width)) dest_regs@[dst]
- args@[src, mask] = do
- let platform = targetPlatform dflags
- if isBmi2Enabled dflags
- then do code_src <- getAnyReg src
- code_mask <- getAnyReg mask
- src_r <- getNewRegNat format
- mask_r <- getNewRegNat format
- let dst_r = getRegisterReg platform False (CmmLocal dst)
- return $ code_src src_r `appOL` code_mask mask_r `appOL`
- (if width == W8 then
- -- The PDEP instruction doesn't take a r/m8
- unitOL (MOVZxL II8 (OpReg src_r ) (OpReg src_r )) `appOL`
- unitOL (MOVZxL II8 (OpReg mask_r) (OpReg mask_r)) `appOL`
- unitOL (PDEP II16 (OpReg mask_r) (OpReg src_r ) dst_r)
- else
- unitOL (PDEP format (OpReg mask_r) (OpReg src_r) dst_r)) `appOL`
- (if width == W8 || width == W16 then
- -- We used a 16-bit destination register above,
- -- so zero-extend
- unitOL (MOVZxL II16 (OpReg dst_r) (OpReg dst_r))
- else nilOL)
- else do
- targetExpr <- cmmMakeDynamicReference dflags
- CallReference lbl
- let target = ForeignTarget targetExpr (ForeignConvention CCallConv
- [NoHint] [NoHint]
- CmmMayReturn)
- genCCall dflags is32Bit target dest_regs args
- where
- format = intFormat width
- lbl = mkCmmCodeLabel primUnitId (fsLit (pdepLabel width))
-
-genCCall dflags is32Bit (PrimTarget (MO_Pext width)) dest_regs@[dst]
- args@[src, mask] = do
- let platform = targetPlatform dflags
- if isBmi2Enabled dflags
- then do code_src <- getAnyReg src
- code_mask <- getAnyReg mask
- src_r <- getNewRegNat format
- mask_r <- getNewRegNat format
- let dst_r = getRegisterReg platform False (CmmLocal dst)
- return $ code_src src_r `appOL` code_mask mask_r `appOL`
- (if width == W8 then
- -- The PEXT instruction doesn't take a r/m8
- unitOL (MOVZxL II8 (OpReg src_r ) (OpReg src_r )) `appOL`
- unitOL (MOVZxL II8 (OpReg mask_r) (OpReg mask_r)) `appOL`
- unitOL (PEXT II16 (OpReg mask_r) (OpReg src_r) dst_r)
- else
- unitOL (PEXT format (OpReg mask_r) (OpReg src_r) dst_r)) `appOL`
- (if width == W8 || width == W16 then
- -- We used a 16-bit destination register above,
- -- so zero-extend
- unitOL (MOVZxL II16 (OpReg dst_r) (OpReg dst_r))
- else nilOL)
- else do
- targetExpr <- cmmMakeDynamicReference dflags
- CallReference lbl
- let target = ForeignTarget targetExpr (ForeignConvention CCallConv
- [NoHint] [NoHint]
- CmmMayReturn)
- genCCall dflags is32Bit target dest_regs args
- where
- format = intFormat width
- lbl = mkCmmCodeLabel primUnitId (fsLit (pextLabel width))
-
genCCall dflags is32Bit (PrimTarget (MO_Clz width)) dest_regs@[dst] args@[src]
| is32Bit && width == W64 = do
-- Fallback to `hs_clz64` on i386
@@ -2755,9 +2689,6 @@ outOfLineCmmOp mop res args
MO_Clz w -> fsLit $ clzLabel w
MO_Ctz _ -> unsupported
- MO_Pdep _ -> fsLit "hs_pdep"
- MO_Pext _ -> fsLit "hs_pext"
-
MO_AtomicRMW _ _ -> fsLit "atomicrmw"
MO_AtomicRead _ -> fsLit "atomicread"
MO_AtomicWrite _ -> fsLit "atomicwrite"