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| author | Gabor Greif <ggreif@gmail.com> | 2013-04-05 20:22:35 +0200 |
|---|---|---|
| committer | Gabor Greif <ggreif@gmail.com> | 2013-04-06 11:41:07 +0200 |
| commit | 9b3d4cdd26a9fbf0a1183185bedbe11925b1ddb4 (patch) | |
| tree | a0476dc6ea466059cfd5a8d8677fa18b7af9b944 /compiler/nativeGen | |
| parent | b84da617c4dadcfbf47796e7a75c21d6b4c4947a (diff) | |
| download | haskell-9b3d4cdd26a9fbf0a1183185bedbe11925b1ddb4.tar.gz | |
Fix typos
Diffstat (limited to 'compiler/nativeGen')
| -rw-r--r-- | compiler/nativeGen/RegAlloc/Linear/Base.hs | 2 | ||||
| -rw-r--r-- | compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs | 2 | ||||
| -rw-r--r-- | compiler/nativeGen/RegAlloc/Linear/SPARC/FreeRegs.hs | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/compiler/nativeGen/RegAlloc/Linear/Base.hs b/compiler/nativeGen/RegAlloc/Linear/Base.hs index e58331347c..d4f124e297 100644 --- a/compiler/nativeGen/RegAlloc/Linear/Base.hs +++ b/compiler/nativeGen/RegAlloc/Linear/Base.hs @@ -99,7 +99,7 @@ data RegAllocStats { ra_spillInstrs :: UniqFM [Int] } --- | The register alloctor state +-- | The register allocator state data RA_State freeRegs = RA_State diff --git a/compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs b/compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs index 333cf75f14..0bdb49fb2e 100644 --- a/compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs +++ b/compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs @@ -42,7 +42,7 @@ releaseReg _ _ initFreeRegs :: Platform -> FreeRegs initFreeRegs platform = foldr releaseReg noFreeRegs (allocatableRegs platform) -getFreeRegs :: RegClass -> FreeRegs -> [RealReg] -- lazilly +getFreeRegs :: RegClass -> FreeRegs -> [RealReg] -- lazily getFreeRegs cls (FreeRegs g f) | RcDouble <- cls = go f (0x80000000) 63 | RcInteger <- cls = go g (0x80000000) 31 diff --git a/compiler/nativeGen/RegAlloc/Linear/SPARC/FreeRegs.hs b/compiler/nativeGen/RegAlloc/Linear/SPARC/FreeRegs.hs index f8f3c92fad..6b6e67c612 100644 --- a/compiler/nativeGen/RegAlloc/Linear/SPARC/FreeRegs.hs +++ b/compiler/nativeGen/RegAlloc/Linear/SPARC/FreeRegs.hs @@ -50,7 +50,7 @@ initFreeRegs platform -- | Get all the free registers of this class. -getFreeRegs :: RegClass -> FreeRegs -> [RealReg] -- lazilly +getFreeRegs :: RegClass -> FreeRegs -> [RealReg] -- lazily getFreeRegs cls (FreeRegs g f d) | RcInteger <- cls = map RealRegSingle $ go 1 g 1 0 | RcFloat <- cls = map RealRegSingle $ go 1 f 1 32 |