enhance ArchARM with ISA and ISA extensions

This patch enhances ArchARM with ARM ISA and ISA extensions details
as is suggested in the comment in Platform.hs file. The patch is needed
by future patch which will use ARM ISA information in order to pass
appropriate command-line option to the LLVM llc tool.

6 files changed, 13 insertions, 13 deletions

diff --git a/compiler/nativeGen/AsmCodeGen.lhs b/compiler/nativeGen/AsmCodeGen.lhs
index 94b0258f57..350f533d85 100644
--- a/compiler/nativeGen/AsmCodeGen.lhs
+++ b/compiler/nativeGen/AsmCodeGen.lhs
@@ -199,7 +199,7 @@ nativeCodeGen dflags h us cmms
                          ,ncgExpandTop              = map SPARC.CodeGen.Expand.expandTop
                          ,ncgMakeFarBranches        = id
                      }
-                 ArchARM ->
+                 ArchARM _ _ ->
                      panic "nativeCodeGen: No NCG for ARM"
                  ArchPPC_64 ->
                      panic "nativeCodeGen: No NCG for PPC 64"
diff --git a/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs b/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs
index e62b4a9abb..6067f23ade 100644
--- a/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs
+++ b/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs
@@ -112,7 +112,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcInteger conflicts excl
                             ArchPPC     -> 16
                             ArchSPARC   -> 14
                             ArchPPC_64  -> panic "trivColorable ArchPPC_64"
-                            ArchARM     -> panic "trivColorable ArchARM"
+                            ArchARM _ _ -> panic "trivColorable ArchARM"
                             ArchUnknown -> panic "trivColorable ArchUnknown")
         , count2        <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_INTEGER
                                 (virtualRegSqueeze RcInteger)
@@ -132,7 +132,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcFloat conflicts exclus
                             ArchPPC     -> 0
                             ArchSPARC   -> 22
                             ArchPPC_64  -> panic "trivColorable ArchPPC_64"
-                            ArchARM     -> panic "trivColorable ArchARM"
+                            ArchARM _ _ -> panic "trivColorable ArchARM"
                             ArchUnknown -> panic "trivColorable ArchUnknown")
         , count2        <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_FLOAT
                                 (virtualRegSqueeze RcFloat)
@@ -152,7 +152,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcDouble conflicts exclu
                             ArchPPC     -> 26
                             ArchSPARC   -> 11
                             ArchPPC_64  -> panic "trivColorable ArchPPC_64"
-                            ArchARM     -> panic "trivColorable ArchARM"
+                            ArchARM _ _ -> panic "trivColorable ArchARM"
                             ArchUnknown -> panic "trivColorable ArchUnknown")
         , count2        <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_DOUBLE
                                 (virtualRegSqueeze RcDouble)
@@ -172,7 +172,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcDoubleSSE conflicts ex
                             ArchPPC     -> 0
                             ArchSPARC   -> 0
                             ArchPPC_64  -> panic "trivColorable ArchPPC_64"
-                            ArchARM     -> panic "trivColorable ArchARM"
+                            ArchARM _ _ -> panic "trivColorable ArchARM"
                             ArchUnknown -> panic "trivColorable ArchUnknown")
         , count2        <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_SSE
                                 (virtualRegSqueeze RcDoubleSSE)
diff --git a/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs b/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs
index 5a413d341e..809e185d9b 100644
--- a/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs
@@ -65,7 +65,7 @@ maxSpillSlots platform
                 ArchX86_64  -> X86.Instr.maxSpillSlots
                 ArchPPC     -> PPC.Instr.maxSpillSlots
                 ArchSPARC   -> SPARC.Instr.maxSpillSlots
-                ArchARM     -> panic "maxSpillSlots ArchARM"
+                ArchARM _ _ -> panic "maxSpillSlots ArchARM"
                 ArchPPC_64  -> panic "maxSpillSlots ArchPPC_64"
                 ArchUnknown -> panic "maxSpillSlots ArchUnknown"
 
diff --git a/compiler/nativeGen/RegAlloc/Linear/Main.hs b/compiler/nativeGen/RegAlloc/Linear/Main.hs
index 8fa758d063..f1af6a5e39 100644
--- a/compiler/nativeGen/RegAlloc/Linear/Main.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/Main.hs
@@ -184,7 +184,7 @@ linearRegAlloc dflags first_id block_live sccs
       ArchX86_64  -> linearRegAlloc' platform (frInitFreeRegs :: X86.FreeRegs)   first_id block_live sccs
       ArchSPARC   -> linearRegAlloc' platform (frInitFreeRegs :: SPARC.FreeRegs) first_id block_live sccs
       ArchPPC     -> linearRegAlloc' platform (frInitFreeRegs :: PPC.FreeRegs)   first_id block_live sccs
-      ArchARM     -> panic "linearRegAlloc ArchARM"
+      ArchARM _ _ -> panic "linearRegAlloc ArchARM"
       ArchPPC_64  -> panic "linearRegAlloc ArchPPC_64"
       ArchUnknown -> panic "linearRegAlloc ArchUnknown"
 
diff --git a/compiler/nativeGen/TargetReg.hs b/compiler/nativeGen/TargetReg.hs
index 089269785c..c633182116 100644
--- a/compiler/nativeGen/TargetReg.hs
+++ b/compiler/nativeGen/TargetReg.hs
@@ -48,7 +48,7 @@ targetVirtualRegSqueeze platform
       ArchPPC     -> PPC.virtualRegSqueeze
       ArchSPARC   -> SPARC.virtualRegSqueeze
       ArchPPC_64  -> panic "targetVirtualRegSqueeze ArchPPC_64"
-      ArchARM     -> panic "targetVirtualRegSqueeze ArchARM"
+      ArchARM _ _ -> panic "targetVirtualRegSqueeze ArchARM"
       ArchUnknown -> panic "targetVirtualRegSqueeze ArchUnknown"
 
 targetRealRegSqueeze :: Platform -> RegClass -> RealReg -> FastInt
@@ -59,7 +59,7 @@ targetRealRegSqueeze platform
       ArchPPC     -> PPC.realRegSqueeze
       ArchSPARC   -> SPARC.realRegSqueeze
       ArchPPC_64  -> panic "targetRealRegSqueeze ArchPPC_64"
-      ArchARM     -> panic "targetRealRegSqueeze ArchARM"
+      ArchARM _ _ -> panic "targetRealRegSqueeze ArchARM"
       ArchUnknown -> panic "targetRealRegSqueeze ArchUnknown"
 
 targetClassOfRealReg :: Platform -> RealReg -> RegClass
@@ -70,7 +70,7 @@ targetClassOfRealReg platform
       ArchPPC     -> PPC.classOfRealReg
       ArchSPARC   -> SPARC.classOfRealReg
       ArchPPC_64  -> panic "targetClassOfRealReg ArchPPC_64"
-      ArchARM     -> panic "targetClassOfRealReg ArchARM"
+      ArchARM _ _ -> panic "targetClassOfRealReg ArchARM"
       ArchUnknown -> panic "targetClassOfRealReg ArchUnknown"
 
 -- TODO: This should look at targetPlatform too
@@ -85,7 +85,7 @@ targetMkVirtualReg platform
       ArchPPC     -> PPC.mkVirtualReg
       ArchSPARC   -> SPARC.mkVirtualReg
       ArchPPC_64  -> panic "targetMkVirtualReg ArchPPC_64"
-      ArchARM     -> panic "targetMkVirtualReg ArchARM"
+      ArchARM _ _ -> panic "targetMkVirtualReg ArchARM"
       ArchUnknown -> panic "targetMkVirtualReg ArchUnknown"
 
 targetRegDotColor :: Platform -> RealReg -> SDoc
@@ -96,7 +96,7 @@ targetRegDotColor platform
       ArchPPC     -> PPC.regDotColor
       ArchSPARC   -> SPARC.regDotColor
       ArchPPC_64  -> panic "targetRegDotColor ArchPPC_64"
-      ArchARM     -> panic "targetRegDotColor ArchARM"
+      ArchARM _ _ -> panic "targetRegDotColor ArchARM"
       ArchUnknown -> panic "targetRegDotColor ArchUnknown"
 
 
diff --git a/compiler/nativeGen/X86/RegInfo.hs b/compiler/nativeGen/X86/RegInfo.hs
index c09ebc5b15..36b749ffda 100644
--- a/compiler/nativeGen/X86/RegInfo.hs
+++ b/compiler/nativeGen/X86/RegInfo.hs
@@ -58,7 +58,7 @@ normalRegColors platform
                   ArchPPC     -> panic "X86 normalRegColors ArchPPC"
                   ArchPPC_64  -> panic "X86 normalRegColors ArchPPC_64"
                   ArchSPARC   -> panic "X86 normalRegColors ArchSPARC"
-                  ArchARM     -> panic "X86 normalRegColors ArchARM"
+                  ArchARM _ _ -> panic "X86 normalRegColors ArchARM"
                   ArchUnknown -> panic "X86 normalRegColors ArchUnknown"
 
 fpRegColors :: [(Reg,String)]