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authorIan Lynagh <igloo@earth.li>2011-10-18 19:01:27 +0100
committerIan Lynagh <igloo@earth.li>2011-10-18 19:01:27 +0100
commit2dea11a442e1d14d86fa661804de06a721943bf0 (patch)
tree954ab91bab33a309e0b7fe2abd288e0edc65d2b0 /compiler
parentf75f26cc4eed3c3cfc256ebfb9e77b8e82a766fc (diff)
downloadhaskell-2dea11a442e1d14d86fa661804de06a721943bf0.tar.gz
Remove ArchUnknown
It doesn't make sense. If platformArch is ArchUnknown then we don't know the answer to any questions about the arch. So now if we don't recognise the arch we just fail, and the new arch will need to be added to the datatype.
Diffstat (limited to 'compiler')
-rw-r--r--compiler/nativeGen/AsmCodeGen.lhs2
-rw-r--r--compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs12
-rw-r--r--compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs1
-rw-r--r--compiler/nativeGen/RegAlloc/Linear/Main.hs1
-rw-r--r--compiler/nativeGen/TargetReg.hs5
-rw-r--r--compiler/nativeGen/X86/RegInfo.hs1
-rw-r--r--compiler/utils/Platform.hs6
7 files changed, 6 insertions, 22 deletions
diff --git a/compiler/nativeGen/AsmCodeGen.lhs b/compiler/nativeGen/AsmCodeGen.lhs
index 09b3bf2ec5..cd695e7b81 100644
--- a/compiler/nativeGen/AsmCodeGen.lhs
+++ b/compiler/nativeGen/AsmCodeGen.lhs
@@ -203,8 +203,6 @@ nativeCodeGen dflags h us cmms
panic "nativeCodeGen: No NCG for ARM"
ArchPPC_64 ->
panic "nativeCodeGen: No NCG for PPC 64"
- ArchUnknown ->
- panic "nativeCodeGen: No NCG for unknown arch"
nativeCodeGen' :: (PlatformOutputable statics, PlatformOutputable instr, Instruction instr)
=> DynFlags
diff --git a/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs b/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs
index 6067f23ade..85b5b746d7 100644
--- a/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs
+++ b/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs
@@ -112,8 +112,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcInteger conflicts excl
ArchPPC -> 16
ArchSPARC -> 14
ArchPPC_64 -> panic "trivColorable ArchPPC_64"
- ArchARM _ _ -> panic "trivColorable ArchARM"
- ArchUnknown -> panic "trivColorable ArchUnknown")
+ ArchARM _ _ -> panic "trivColorable ArchARM")
, count2 <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_INTEGER
(virtualRegSqueeze RcInteger)
conflicts
@@ -132,8 +131,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcFloat conflicts exclus
ArchPPC -> 0
ArchSPARC -> 22
ArchPPC_64 -> panic "trivColorable ArchPPC_64"
- ArchARM _ _ -> panic "trivColorable ArchARM"
- ArchUnknown -> panic "trivColorable ArchUnknown")
+ ArchARM _ _ -> panic "trivColorable ArchARM")
, count2 <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_FLOAT
(virtualRegSqueeze RcFloat)
conflicts
@@ -152,8 +150,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcDouble conflicts exclu
ArchPPC -> 26
ArchSPARC -> 11
ArchPPC_64 -> panic "trivColorable ArchPPC_64"
- ArchARM _ _ -> panic "trivColorable ArchARM"
- ArchUnknown -> panic "trivColorable ArchUnknown")
+ ArchARM _ _ -> panic "trivColorable ArchARM")
, count2 <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_DOUBLE
(virtualRegSqueeze RcDouble)
conflicts
@@ -172,8 +169,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcDoubleSSE conflicts ex
ArchPPC -> 0
ArchSPARC -> 0
ArchPPC_64 -> panic "trivColorable ArchPPC_64"
- ArchARM _ _ -> panic "trivColorable ArchARM"
- ArchUnknown -> panic "trivColorable ArchUnknown")
+ ArchARM _ _ -> panic "trivColorable ArchARM")
, count2 <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_SSE
(virtualRegSqueeze RcDoubleSSE)
conflicts
diff --git a/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs b/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs
index 809e185d9b..22fc388d0d 100644
--- a/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs
@@ -67,5 +67,4 @@ maxSpillSlots platform
ArchSPARC -> SPARC.Instr.maxSpillSlots
ArchARM _ _ -> panic "maxSpillSlots ArchARM"
ArchPPC_64 -> panic "maxSpillSlots ArchPPC_64"
- ArchUnknown -> panic "maxSpillSlots ArchUnknown"
diff --git a/compiler/nativeGen/RegAlloc/Linear/Main.hs b/compiler/nativeGen/RegAlloc/Linear/Main.hs
index fc0bde44a0..2d6508096f 100644
--- a/compiler/nativeGen/RegAlloc/Linear/Main.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/Main.hs
@@ -186,7 +186,6 @@ linearRegAlloc dflags first_id block_live sccs
ArchPPC -> linearRegAlloc' platform (frInitFreeRegs :: PPC.FreeRegs) first_id block_live sccs
ArchARM _ _ -> panic "linearRegAlloc ArchARM"
ArchPPC_64 -> panic "linearRegAlloc ArchPPC_64"
- ArchUnknown -> panic "linearRegAlloc ArchUnknown"
linearRegAlloc'
:: (FR freeRegs, PlatformOutputable instr, Instruction instr)
diff --git a/compiler/nativeGen/TargetReg.hs b/compiler/nativeGen/TargetReg.hs
index c633182116..ce7b97bd86 100644
--- a/compiler/nativeGen/TargetReg.hs
+++ b/compiler/nativeGen/TargetReg.hs
@@ -49,7 +49,6 @@ targetVirtualRegSqueeze platform
ArchSPARC -> SPARC.virtualRegSqueeze
ArchPPC_64 -> panic "targetVirtualRegSqueeze ArchPPC_64"
ArchARM _ _ -> panic "targetVirtualRegSqueeze ArchARM"
- ArchUnknown -> panic "targetVirtualRegSqueeze ArchUnknown"
targetRealRegSqueeze :: Platform -> RegClass -> RealReg -> FastInt
targetRealRegSqueeze platform
@@ -60,7 +59,6 @@ targetRealRegSqueeze platform
ArchSPARC -> SPARC.realRegSqueeze
ArchPPC_64 -> panic "targetRealRegSqueeze ArchPPC_64"
ArchARM _ _ -> panic "targetRealRegSqueeze ArchARM"
- ArchUnknown -> panic "targetRealRegSqueeze ArchUnknown"
targetClassOfRealReg :: Platform -> RealReg -> RegClass
targetClassOfRealReg platform
@@ -71,7 +69,6 @@ targetClassOfRealReg platform
ArchSPARC -> SPARC.classOfRealReg
ArchPPC_64 -> panic "targetClassOfRealReg ArchPPC_64"
ArchARM _ _ -> panic "targetClassOfRealReg ArchARM"
- ArchUnknown -> panic "targetClassOfRealReg ArchUnknown"
-- TODO: This should look at targetPlatform too
targetWordSize :: Size
@@ -86,7 +83,6 @@ targetMkVirtualReg platform
ArchSPARC -> SPARC.mkVirtualReg
ArchPPC_64 -> panic "targetMkVirtualReg ArchPPC_64"
ArchARM _ _ -> panic "targetMkVirtualReg ArchARM"
- ArchUnknown -> panic "targetMkVirtualReg ArchUnknown"
targetRegDotColor :: Platform -> RealReg -> SDoc
targetRegDotColor platform
@@ -97,7 +93,6 @@ targetRegDotColor platform
ArchSPARC -> SPARC.regDotColor
ArchPPC_64 -> panic "targetRegDotColor ArchPPC_64"
ArchARM _ _ -> panic "targetRegDotColor ArchARM"
- ArchUnknown -> panic "targetRegDotColor ArchUnknown"
targetClassOfReg :: Platform -> Reg -> RegClass
diff --git a/compiler/nativeGen/X86/RegInfo.hs b/compiler/nativeGen/X86/RegInfo.hs
index 36b749ffda..8f41e8e052 100644
--- a/compiler/nativeGen/X86/RegInfo.hs
+++ b/compiler/nativeGen/X86/RegInfo.hs
@@ -59,7 +59,6 @@ normalRegColors platform
ArchPPC_64 -> panic "X86 normalRegColors ArchPPC_64"
ArchSPARC -> panic "X86 normalRegColors ArchSPARC"
ArchARM _ _ -> panic "X86 normalRegColors ArchARM"
- ArchUnknown -> panic "X86 normalRegColors ArchUnknown"
fpRegColors :: [(Reg,String)]
fpRegColors =
diff --git a/compiler/utils/Platform.hs b/compiler/utils/Platform.hs
index 7446fc1099..b4eb7aad81 100644
--- a/compiler/utils/Platform.hs
+++ b/compiler/utils/Platform.hs
@@ -36,8 +36,7 @@ data Platform
-- about what instruction set extensions an architecture might support.
--
data Arch
- = ArchUnknown
- | ArchX86
+ = ArchX86
| ArchX86_64
| ArchPPC
| ArchPPC_64
@@ -77,7 +76,6 @@ data ArmISAExt
target32Bit :: Platform -> Bool
target32Bit p = case platformArch p of
- ArchUnknown -> panic "Don't know if ArchUnknown is 32bit"
ArchX86 -> True
ArchX86_64 -> False
ArchPPC -> True
@@ -118,7 +116,7 @@ defaultTargetArch = ArchSPARC
#elif arm_TARGET_ARCH
defaultTargetArch = ArchARM defaultTargetArmISA defaultTargetArmISAExt
#else
-defaultTargetArch = ArchUnknown
+#error Unknown Arch
#endif