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authorÖmer Sinan Ağacan <omeragacan@gmail.com>2016-08-06 12:55:54 +0000
committerÖmer Sinan Ağacan <omeragacan@gmail.com>2016-08-06 13:10:29 +0000
commit03af3990e65093ff8230ceab67f0c9bcf3ce8684 (patch)
tree0b955a60bf931b9aa2ce89a25d6549bef4af8ff6 /compiler
parentaffcec7d5b0426be332022d546486bef31248b72 (diff)
downloadhaskell-03af3990e65093ff8230ceab67f0c9bcf3ce8684.tar.gz
AsmCodeGen: Give linear-scan and coloring reg. allocators different cc names
Diffstat (limited to 'compiler')
-rw-r--r--compiler/nativeGen/AsmCodeGen.hs4
1 files changed, 2 insertions, 2 deletions
diff --git a/compiler/nativeGen/AsmCodeGen.hs b/compiler/nativeGen/AsmCodeGen.hs
index 46c6fa4763..24a9db97c3 100644
--- a/compiler/nativeGen/AsmCodeGen.hs
+++ b/compiler/nativeGen/AsmCodeGen.hs
@@ -549,7 +549,7 @@ cmmNativeGen dflags this_mod modLoc ncgImpl us fileIds dbgMap cmm count
-- do the graph coloring register allocation
let ((alloced, regAllocStats), usAlloc)
- = {-# SCC "RegAlloc" #-}
+ = {-# SCC "RegAlloc-color" #-}
initUs usLive
$ Color.regAlloc
dflags
@@ -593,7 +593,7 @@ cmmNativeGen dflags this_mod modLoc ncgImpl us fileIds dbgMap cmm count
return (alloced', ra_stats )
let ((alloced, regAllocStats), usAlloc)
- = {-# SCC "RegAlloc" #-}
+ = {-# SCC "RegAlloc-linear" #-}
initUs usLive
$ liftM unzip
$ mapM reg_alloc withLiveness