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| author | Geoffrey Mainland <gmainlan@microsoft.com> | 2013-02-14 18:52:00 +0000 |
|---|---|---|
| committer | Geoffrey Mainland <gmainlan@microsoft.com> | 2013-09-22 22:33:59 -0400 |
| commit | e074c1c23307649bd2d240d40a73d3829b06a4b4 (patch) | |
| tree | 487320573dcd2c2b7f9a239b80ff67d6191f8032 /compiler | |
| parent | 9d47e583e14923745380445ee52b16e69e926ebe (diff) | |
| download | haskell-e074c1c23307649bd2d240d40a73d3829b06a4b4.tar.gz | |
Add support for 256-bit-wide vectors.
Diffstat (limited to 'compiler')
| -rw-r--r-- | compiler/codeGen/StgCmmArgRep.hs | 11 | ||||
| -rw-r--r-- | compiler/codeGen/StgCmmLayout.hs | 1 | ||||
| -rw-r--r-- | compiler/ghci/ByteCodeAsm.lhs | 2 |
3 files changed, 11 insertions, 3 deletions
diff --git a/compiler/codeGen/StgCmmArgRep.hs b/compiler/codeGen/StgCmmArgRep.hs index bd228d4617..26569cffdd 100644 --- a/compiler/codeGen/StgCmmArgRep.hs +++ b/compiler/codeGen/StgCmmArgRep.hs @@ -47,6 +47,7 @@ data ArgRep = P -- GC Ptr | F -- Float | D -- Double | V16 -- 16-byte (128-bit) vectors of Float/Double/Int8/Word32/etc. + | V32 -- 32-byte (256-bit) vectors of Float/Double/Int8/Word32/etc. instance Outputable ArgRep where ppr = text . argRepString argRepString :: ArgRep -> String @@ -57,6 +58,7 @@ argRepString V = "V" argRepString F = "F" argRepString D = "D" argRepString V16 = "V16" +argRepString V32 = "V32" toArgRep :: PrimRep -> ArgRep toArgRep VoidRep = V @@ -68,9 +70,10 @@ toArgRep Int64Rep = L toArgRep Word64Rep = L toArgRep FloatRep = F toArgRep DoubleRep = D -toArgRep (VecRep len elem) - | len*primElemRepSizeB elem == 16 = V16 - | otherwise = error "toArgRep: bad vector primrep" +toArgRep (VecRep len elem) = case len*primElemRepSizeB elem of + 16 -> V16 + 32 -> V32 + _ -> error "toArgRep: bad vector primrep" isNonV :: ArgRep -> Bool isNonV V = False @@ -84,6 +87,7 @@ argRepSizeW dflags L = wORD64_SIZE `quot` wORD_SIZE dflags argRepSizeW dflags D = dOUBLE_SIZE dflags `quot` wORD_SIZE dflags argRepSizeW _ V = 0 argRepSizeW dflags V16 = 16 `quot` wORD_SIZE dflags +argRepSizeW dflags V32 = 32 `quot` wORD_SIZE dflags idArgRep :: Id -> ArgRep idArgRep = toArgRep . idPrimRep @@ -132,4 +136,5 @@ slowCallPattern (F: _) = (fsLit "stg_ap_f", 1) slowCallPattern (D: _) = (fsLit "stg_ap_d", 1) slowCallPattern (L: _) = (fsLit "stg_ap_l", 1) slowCallPattern (V16: _) = (fsLit "stg_ap_v16", 1) +slowCallPattern (V32: _) = (fsLit "stg_ap_v32", 1) slowCallPattern [] = (fsLit "stg_ap_0", 0) diff --git a/compiler/codeGen/StgCmmLayout.hs b/compiler/codeGen/StgCmmLayout.hs index b52d4e57df..30c2d36ff2 100644 --- a/compiler/codeGen/StgCmmLayout.hs +++ b/compiler/codeGen/StgCmmLayout.hs @@ -385,6 +385,7 @@ stdPattern reps [D] -> Just ARG_D [L] -> Just ARG_L [V16] -> Just ARG_V16 + [V32] -> Just ARG_V32 [N,N] -> Just ARG_NN [N,P] -> Just ARG_NP diff --git a/compiler/ghci/ByteCodeAsm.lhs b/compiler/ghci/ByteCodeAsm.lhs index dd8bbe4c83..e6cec874f4 100644 --- a/compiler/ghci/ByteCodeAsm.lhs +++ b/compiler/ghci/ByteCodeAsm.lhs @@ -462,6 +462,7 @@ push_alts L = bci_PUSH_ALTS_L push_alts F = bci_PUSH_ALTS_F push_alts D = bci_PUSH_ALTS_D push_alts V16 = error "push_alts: vector" +push_alts V32 = error "push_alts: vector" return_ubx :: ArgRep -> Word16 return_ubx V = bci_RETURN_V @@ -471,6 +472,7 @@ return_ubx L = bci_RETURN_L return_ubx F = bci_RETURN_F return_ubx D = bci_RETURN_D return_ubx V16 = error "return_ubx: vector" +return_ubx V32 = error "return_ubx: vector" -- Make lists of host-sized words for literals, so that when the -- words are placed in memory at increasing addresses, the |