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authorSylvain Henry <sylvain@haskus.fr>2020-07-02 10:06:45 +0200
committerMarge Bot <ben+marge-bot@smart-cactus.org>2020-07-03 02:50:40 -0400
commitedc8d22b2eea5d43dd6c3d0e4b2f85fc02ffa5ce (patch)
tree1190550aeb5a25a30a2f1f7f3d535f501cfe14bc /compiler
parent34be6523a220b2be972b391d8ad26b75f7c26eb1 (diff)
downloadhaskell-edc8d22b2eea5d43dd6c3d0e4b2f85fc02ffa5ce.tar.gz
LLVM: support R9 and R10 registers
d535ef006d85dbdb7cda2b09c5bc35cb80108909 allowed the use of up to 10 vanilla registers but didn't update LLVM backend to support them. This patch fixes it.
Diffstat (limited to 'compiler')
-rw-r--r--compiler/GHC/CmmToLlvm/Regs.hs2
1 files changed, 2 insertions, 0 deletions
diff --git a/compiler/GHC/CmmToLlvm/Regs.hs b/compiler/GHC/CmmToLlvm/Regs.hs
index 0951c7e37f..dc878fce30 100644
--- a/compiler/GHC/CmmToLlvm/Regs.hs
+++ b/compiler/GHC/CmmToLlvm/Regs.hs
@@ -47,6 +47,8 @@ lmGlobalReg platform suf reg
VanillaReg 6 _ -> wordGlobal $ "R6" ++ suf
VanillaReg 7 _ -> wordGlobal $ "R7" ++ suf
VanillaReg 8 _ -> wordGlobal $ "R8" ++ suf
+ VanillaReg 9 _ -> wordGlobal $ "R9" ++ suf
+ VanillaReg 10 _ -> wordGlobal $ "R10" ++ suf
SpLim -> wordGlobal $ "SpLim" ++ suf
FloatReg 1 -> floatGlobal $"F1" ++ suf
FloatReg 2 -> floatGlobal $"F2" ++ suf