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authorStefan Schulze Frielinghaus <stefansf@linux.ibm.com>2019-10-08 12:32:15 +0200
committerMarge Bot <ben+marge-bot@smart-cactus.org>2019-10-22 02:39:03 -0400
commitfd8b666acfee5524a2d7c8b845a3782f6a89bec7 (patch)
tree4ce0d732ef341bcffa721f6d25f2cf4dcd476fd8 /compiler
parentaa31ceaf7568802590f73a740ffbc8b800096342 (diff)
downloadhaskell-fd8b666acfee5524a2d7c8b845a3782f6a89bec7.tar.gz
Implement s390x LLVM backend.
This patch adds support for the s390x architecture for the LLVM code generator. The patch includes a register mapping of STG registers onto s390x machine registers which enables a registerised build.
Diffstat (limited to 'compiler')
-rw-r--r--compiler/GHC/Platform/Regs.hs6
-rw-r--r--compiler/GHC/Platform/S390X.hs10
-rw-r--r--compiler/ghc.cabal.in1
-rw-r--r--compiler/llvmGen/LlvmCodeGen/Data.hs4
-rw-r--r--compiler/nativeGen/AsmCodeGen.hs1
-rw-r--r--compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs3
-rw-r--r--compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs1
-rw-r--r--compiler/nativeGen/RegAlloc/Linear/Main.hs1
-rw-r--r--compiler/nativeGen/TargetReg.hs5
9 files changed, 31 insertions, 1 deletions
diff --git a/compiler/GHC/Platform/Regs.hs b/compiler/GHC/Platform/Regs.hs
index e7887fbe72..fe6588d067 100644
--- a/compiler/GHC/Platform/Regs.hs
+++ b/compiler/GHC/Platform/Regs.hs
@@ -12,6 +12,7 @@ import Reg
import qualified GHC.Platform.ARM as ARM
import qualified GHC.Platform.ARM64 as ARM64
import qualified GHC.Platform.PPC as PPC
+import qualified GHC.Platform.S390X as S390X
import qualified GHC.Platform.SPARC as SPARC
import qualified GHC.Platform.X86 as X86
import qualified GHC.Platform.X86_64 as X86_64
@@ -27,6 +28,7 @@ callerSaves platform
= case platformArch platform of
ArchX86 -> X86.callerSaves
ArchX86_64 -> X86_64.callerSaves
+ ArchS390X -> S390X.callerSaves
ArchSPARC -> SPARC.callerSaves
ArchARM {} -> ARM.callerSaves
ArchARM64 -> ARM64.callerSaves
@@ -48,6 +50,7 @@ activeStgRegs platform
= case platformArch platform of
ArchX86 -> X86.activeStgRegs
ArchX86_64 -> X86_64.activeStgRegs
+ ArchS390X -> S390X.activeStgRegs
ArchSPARC -> SPARC.activeStgRegs
ArchARM {} -> ARM.activeStgRegs
ArchARM64 -> ARM64.activeStgRegs
@@ -64,6 +67,7 @@ haveRegBase platform
= case platformArch platform of
ArchX86 -> X86.haveRegBase
ArchX86_64 -> X86_64.haveRegBase
+ ArchS390X -> S390X.haveRegBase
ArchSPARC -> SPARC.haveRegBase
ArchARM {} -> ARM.haveRegBase
ArchARM64 -> ARM64.haveRegBase
@@ -80,6 +84,7 @@ globalRegMaybe platform
= case platformArch platform of
ArchX86 -> X86.globalRegMaybe
ArchX86_64 -> X86_64.globalRegMaybe
+ ArchS390X -> S390X.globalRegMaybe
ArchSPARC -> SPARC.globalRegMaybe
ArchARM {} -> ARM.globalRegMaybe
ArchARM64 -> ARM64.globalRegMaybe
@@ -96,6 +101,7 @@ freeReg platform
= case platformArch platform of
ArchX86 -> X86.freeReg
ArchX86_64 -> X86_64.freeReg
+ ArchS390X -> S390X.freeReg
ArchSPARC -> SPARC.freeReg
ArchARM {} -> ARM.freeReg
ArchARM64 -> ARM64.freeReg
diff --git a/compiler/GHC/Platform/S390X.hs b/compiler/GHC/Platform/S390X.hs
new file mode 100644
index 0000000000..8599bb67c0
--- /dev/null
+++ b/compiler/GHC/Platform/S390X.hs
@@ -0,0 +1,10 @@
+{-# LANGUAGE CPP #-}
+
+module GHC.Platform.S390X where
+
+import GhcPrelude
+
+#define MACHREGS_NO_REGS 0
+#define MACHREGS_s390x 1
+#include "../../../includes/CodeGen.Platform.hs"
+
diff --git a/compiler/ghc.cabal.in b/compiler/ghc.cabal.in
index 4737d13c0b..7e9171adc9 100644
--- a/compiler/ghc.cabal.in
+++ b/compiler/ghc.cabal.in
@@ -285,6 +285,7 @@ Library
GHC.Platform.ARM64
GHC.Platform.NoRegs
GHC.Platform.PPC
+ GHC.Platform.S390X
GHC.Platform.SPARC
GHC.Platform.X86
GHC.Platform.X86_64
diff --git a/compiler/llvmGen/LlvmCodeGen/Data.hs b/compiler/llvmGen/LlvmCodeGen/Data.hs
index 70a04e6bc9..4c07f8ee8f 100644
--- a/compiler/llvmGen/LlvmCodeGen/Data.hs
+++ b/compiler/llvmGen/LlvmCodeGen/Data.hs
@@ -71,6 +71,7 @@ genLlvmData (sec, Statics lbl xs) = do
label <- strCLabel_llvm lbl
static <- mapM genData xs
lmsec <- llvmSection sec
+ platform <- getLlvmPlatform
let types = map getStatType static
strucTy = LMStruct types
@@ -79,7 +80,8 @@ genLlvmData (sec, Statics lbl xs) = do
struct = Just $ LMStaticStruc static tyAlias
link = linkage lbl
align = case sec of
- Section CString _ -> Just 1
+ Section CString _ -> if (platformArch platform == ArchS390X)
+ then Just 2 else Just 1
_ -> Nothing
const = if isSecConstant sec then Constant else Global
varDef = LMGlobalVar label tyAlias link lmsec align const
diff --git a/compiler/nativeGen/AsmCodeGen.hs b/compiler/nativeGen/AsmCodeGen.hs
index 4c883e7185..6b85d388bb 100644
--- a/compiler/nativeGen/AsmCodeGen.hs
+++ b/compiler/nativeGen/AsmCodeGen.hs
@@ -168,6 +168,7 @@ nativeCodeGen dflags this_mod modLoc h us cmms
ArchX86 -> nCG' (x86NcgImpl dflags)
ArchX86_64 -> nCG' (x86_64NcgImpl dflags)
ArchPPC -> nCG' (ppcNcgImpl dflags)
+ ArchS390X -> panic "nativeCodeGen: No NCG for S390X"
ArchSPARC -> nCG' (sparcNcgImpl dflags)
ArchSPARC64 -> panic "nativeCodeGen: No NCG for SPARC64"
ArchARM {} -> panic "nativeCodeGen: No NCG for ARM"
diff --git a/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs b/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs
index 5d4fd418c3..773db33293 100644
--- a/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs
+++ b/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs
@@ -119,6 +119,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcInteger conflicts excl
ArchAlpha -> panic "trivColorable ArchAlpha"
ArchMipseb -> panic "trivColorable ArchMipseb"
ArchMipsel -> panic "trivColorable ArchMipsel"
+ ArchS390X -> panic "trivColorable ArchS390X"
ArchJavaScript-> panic "trivColorable ArchJavaScript"
ArchUnknown -> panic "trivColorable ArchUnknown")
, count2 <- accSqueeze 0 cALLOCATABLE_REGS_INTEGER
@@ -149,6 +150,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcFloat conflicts exclus
ArchAlpha -> panic "trivColorable ArchAlpha"
ArchMipseb -> panic "trivColorable ArchMipseb"
ArchMipsel -> panic "trivColorable ArchMipsel"
+ ArchS390X -> panic "trivColorable ArchS390X"
ArchJavaScript-> panic "trivColorable ArchJavaScript"
ArchUnknown -> panic "trivColorable ArchUnknown")
, count2 <- accSqueeze 0 cALLOCATABLE_REGS_FLOAT
@@ -181,6 +183,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcDouble conflicts exclu
ArchAlpha -> panic "trivColorable ArchAlpha"
ArchMipseb -> panic "trivColorable ArchMipseb"
ArchMipsel -> panic "trivColorable ArchMipsel"
+ ArchS390X -> panic "trivColorable ArchS390X"
ArchJavaScript-> panic "trivColorable ArchJavaScript"
ArchUnknown -> panic "trivColorable ArchUnknown")
, count2 <- accSqueeze 0 cALLOCATABLE_REGS_DOUBLE
diff --git a/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs b/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs
index 5a4f1c65a8..0feddc67d8 100644
--- a/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs
@@ -75,6 +75,7 @@ maxSpillSlots dflags
ArchX86 -> X86.Instr.maxSpillSlots dflags
ArchX86_64 -> X86.Instr.maxSpillSlots dflags
ArchPPC -> PPC.Instr.maxSpillSlots dflags
+ ArchS390X -> panic "maxSpillSlots ArchS390X"
ArchSPARC -> SPARC.Instr.maxSpillSlots dflags
ArchSPARC64 -> panic "maxSpillSlots ArchSPARC64"
ArchARM _ _ _ -> panic "maxSpillSlots ArchARM"
diff --git a/compiler/nativeGen/RegAlloc/Linear/Main.hs b/compiler/nativeGen/RegAlloc/Linear/Main.hs
index cdaf738d68..eac9194c6a 100644
--- a/compiler/nativeGen/RegAlloc/Linear/Main.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/Main.hs
@@ -211,6 +211,7 @@ linearRegAlloc dflags entry_ids block_live sccs
= case platformArch platform of
ArchX86 -> go $ (frInitFreeRegs platform :: X86.FreeRegs)
ArchX86_64 -> go $ (frInitFreeRegs platform :: X86_64.FreeRegs)
+ ArchS390X -> panic "linearRegAlloc ArchS390X"
ArchSPARC -> go $ (frInitFreeRegs platform :: SPARC.FreeRegs)
ArchSPARC64 -> panic "linearRegAlloc ArchSPARC64"
ArchPPC -> go $ (frInitFreeRegs platform :: PPC.FreeRegs)
diff --git a/compiler/nativeGen/TargetReg.hs b/compiler/nativeGen/TargetReg.hs
index da39b635b2..e0eca9235d 100644
--- a/compiler/nativeGen/TargetReg.hs
+++ b/compiler/nativeGen/TargetReg.hs
@@ -44,6 +44,7 @@ targetVirtualRegSqueeze platform
ArchX86 -> X86.virtualRegSqueeze
ArchX86_64 -> X86.virtualRegSqueeze
ArchPPC -> PPC.virtualRegSqueeze
+ ArchS390X -> panic "targetVirtualRegSqueeze ArchS390X"
ArchSPARC -> SPARC.virtualRegSqueeze
ArchSPARC64 -> panic "targetVirtualRegSqueeze ArchSPARC64"
ArchPPC_64 _ -> PPC.virtualRegSqueeze
@@ -62,6 +63,7 @@ targetRealRegSqueeze platform
ArchX86 -> X86.realRegSqueeze
ArchX86_64 -> X86.realRegSqueeze
ArchPPC -> PPC.realRegSqueeze
+ ArchS390X -> panic "targetRealRegSqueeze ArchS390X"
ArchSPARC -> SPARC.realRegSqueeze
ArchSPARC64 -> panic "targetRealRegSqueeze ArchSPARC64"
ArchPPC_64 _ -> PPC.realRegSqueeze
@@ -79,6 +81,7 @@ targetClassOfRealReg platform
ArchX86 -> X86.classOfRealReg platform
ArchX86_64 -> X86.classOfRealReg platform
ArchPPC -> PPC.classOfRealReg
+ ArchS390X -> panic "targetClassOfRealReg ArchS390X"
ArchSPARC -> SPARC.classOfRealReg
ArchSPARC64 -> panic "targetClassOfRealReg ArchSPARC64"
ArchPPC_64 _ -> PPC.classOfRealReg
@@ -96,6 +99,7 @@ targetMkVirtualReg platform
ArchX86 -> X86.mkVirtualReg
ArchX86_64 -> X86.mkVirtualReg
ArchPPC -> PPC.mkVirtualReg
+ ArchS390X -> panic "targetMkVirtualReg ArchS390X"
ArchSPARC -> SPARC.mkVirtualReg
ArchSPARC64 -> panic "targetMkVirtualReg ArchSPARC64"
ArchPPC_64 _ -> PPC.mkVirtualReg
@@ -113,6 +117,7 @@ targetRegDotColor platform
ArchX86 -> X86.regDotColor platform
ArchX86_64 -> X86.regDotColor platform
ArchPPC -> PPC.regDotColor
+ ArchS390X -> panic "targetRegDotColor ArchS390X"
ArchSPARC -> SPARC.regDotColor
ArchSPARC64 -> panic "targetRegDotColor ArchSPARC64"
ArchPPC_64 _ -> PPC.regDotColor