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author | Ben Gamari <ben@smart-cactus.org> | 2017-04-21 09:16:48 -0400 |
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committer | Ben Gamari <ben@smart-cactus.org> | 2017-04-28 22:35:04 -0400 |
commit | 945c45ad50ed31e3acb96fdaafb21640c4669f12 (patch) | |
tree | ae2e59ba8d3a49bbd3c3dcece39d53aef691ed44 /includes/CodeGen.Platform.hs | |
parent | e5b3492f23c2296d0d8221e1787ee585331f726e (diff) | |
download | haskell-945c45ad50ed31e3acb96fdaafb21640c4669f12.tar.gz |
Prefer #if defined to #ifdef
Our new CPP linter enforces this.
Diffstat (limited to 'includes/CodeGen.Platform.hs')
-rw-r--r-- | includes/CodeGen.Platform.hs | 410 |
1 files changed, 205 insertions, 205 deletions
diff --git a/includes/CodeGen.Platform.hs b/includes/CodeGen.Platform.hs index 97628aecdc..868608a1ed 100644 --- a/includes/CodeGen.Platform.hs +++ b/includes/CodeGen.Platform.hs @@ -352,278 +352,278 @@ import Reg #endif callerSaves :: GlobalReg -> Bool -#ifdef CALLER_SAVES_Base +#if defined(CALLER_SAVES_Base) callerSaves BaseReg = True #endif -#ifdef CALLER_SAVES_R1 +#if defined(CALLER_SAVES_R1) callerSaves (VanillaReg 1 _) = True #endif -#ifdef CALLER_SAVES_R2 +#if defined(CALLER_SAVES_R2) callerSaves (VanillaReg 2 _) = True #endif -#ifdef CALLER_SAVES_R3 +#if defined(CALLER_SAVES_R3) callerSaves (VanillaReg 3 _) = True #endif -#ifdef CALLER_SAVES_R4 +#if defined(CALLER_SAVES_R4) callerSaves (VanillaReg 4 _) = True #endif -#ifdef CALLER_SAVES_R5 +#if defined(CALLER_SAVES_R5) callerSaves (VanillaReg 5 _) = True #endif -#ifdef CALLER_SAVES_R6 +#if defined(CALLER_SAVES_R6) callerSaves (VanillaReg 6 _) = True #endif -#ifdef CALLER_SAVES_R7 +#if defined(CALLER_SAVES_R7) callerSaves (VanillaReg 7 _) = True #endif -#ifdef CALLER_SAVES_R8 +#if defined(CALLER_SAVES_R8) callerSaves (VanillaReg 8 _) = True #endif -#ifdef CALLER_SAVES_R9 +#if defined(CALLER_SAVES_R9) callerSaves (VanillaReg 9 _) = True #endif -#ifdef CALLER_SAVES_R10 +#if defined(CALLER_SAVES_R10) callerSaves (VanillaReg 10 _) = True #endif -#ifdef CALLER_SAVES_F1 +#if defined(CALLER_SAVES_F1) callerSaves (FloatReg 1) = True #endif -#ifdef CALLER_SAVES_F2 +#if defined(CALLER_SAVES_F2) callerSaves (FloatReg 2) = True #endif -#ifdef CALLER_SAVES_F3 +#if defined(CALLER_SAVES_F3) callerSaves (FloatReg 3) = True #endif -#ifdef CALLER_SAVES_F4 +#if defined(CALLER_SAVES_F4) callerSaves (FloatReg 4) = True #endif -#ifdef CALLER_SAVES_F5 +#if defined(CALLER_SAVES_F5) callerSaves (FloatReg 5) = True #endif -#ifdef CALLER_SAVES_F6 +#if defined(CALLER_SAVES_F6) callerSaves (FloatReg 6) = True #endif -#ifdef CALLER_SAVES_D1 +#if defined(CALLER_SAVES_D1) callerSaves (DoubleReg 1) = True #endif -#ifdef CALLER_SAVES_D2 +#if defined(CALLER_SAVES_D2) callerSaves (DoubleReg 2) = True #endif -#ifdef CALLER_SAVES_D3 +#if defined(CALLER_SAVES_D3) callerSaves (DoubleReg 3) = True #endif -#ifdef CALLER_SAVES_D4 +#if defined(CALLER_SAVES_D4) callerSaves (DoubleReg 4) = True #endif -#ifdef CALLER_SAVES_D5 +#if defined(CALLER_SAVES_D5) callerSaves (DoubleReg 5) = True #endif -#ifdef CALLER_SAVES_D6 +#if defined(CALLER_SAVES_D6) callerSaves (DoubleReg 6) = True #endif -#ifdef CALLER_SAVES_L1 +#if defined(CALLER_SAVES_L1) callerSaves (LongReg 1) = True #endif -#ifdef CALLER_SAVES_Sp +#if defined(CALLER_SAVES_Sp) callerSaves Sp = True #endif -#ifdef CALLER_SAVES_SpLim +#if defined(CALLER_SAVES_SpLim) callerSaves SpLim = True #endif -#ifdef CALLER_SAVES_Hp +#if defined(CALLER_SAVES_Hp) callerSaves Hp = True #endif -#ifdef CALLER_SAVES_HpLim +#if defined(CALLER_SAVES_HpLim) callerSaves HpLim = True #endif -#ifdef CALLER_SAVES_CCCS +#if defined(CALLER_SAVES_CCCS) callerSaves CCCS = True #endif -#ifdef CALLER_SAVES_CurrentTSO +#if defined(CALLER_SAVES_CurrentTSO) callerSaves CurrentTSO = True #endif -#ifdef CALLER_SAVES_CurrentNursery +#if defined(CALLER_SAVES_CurrentNursery) callerSaves CurrentNursery = True #endif callerSaves _ = False activeStgRegs :: [GlobalReg] activeStgRegs = [ -#ifdef REG_Base +#if defined(REG_Base) BaseReg #endif -#ifdef REG_Sp +#if defined(REG_Sp) ,Sp #endif -#ifdef REG_Hp +#if defined(REG_Hp) ,Hp #endif -#ifdef REG_R1 +#if defined(REG_R1) ,VanillaReg 1 VGcPtr #endif -#ifdef REG_R2 +#if defined(REG_R2) ,VanillaReg 2 VGcPtr #endif -#ifdef REG_R3 +#if defined(REG_R3) ,VanillaReg 3 VGcPtr #endif -#ifdef REG_R4 +#if defined(REG_R4) ,VanillaReg 4 VGcPtr #endif -#ifdef REG_R5 +#if defined(REG_R5) ,VanillaReg 5 VGcPtr #endif -#ifdef REG_R6 +#if defined(REG_R6) ,VanillaReg 6 VGcPtr #endif -#ifdef REG_R7 +#if defined(REG_R7) ,VanillaReg 7 VGcPtr #endif -#ifdef REG_R8 +#if defined(REG_R8) ,VanillaReg 8 VGcPtr #endif -#ifdef REG_R9 +#if defined(REG_R9) ,VanillaReg 9 VGcPtr #endif -#ifdef REG_R10 +#if defined(REG_R10) ,VanillaReg 10 VGcPtr #endif -#ifdef REG_SpLim +#if defined(REG_SpLim) ,SpLim #endif #if MAX_REAL_XMM_REG != 0 -#ifdef REG_F1 +#if defined(REG_F1) ,FloatReg 1 #endif -#ifdef REG_D1 +#if defined(REG_D1) ,DoubleReg 1 #endif -#ifdef REG_XMM1 +#if defined(REG_XMM1) ,XmmReg 1 #endif -#ifdef REG_YMM1 +#if defined(REG_YMM1) ,YmmReg 1 #endif -#ifdef REG_ZMM1 +#if defined(REG_ZMM1) ,ZmmReg 1 #endif -#ifdef REG_F2 +#if defined(REG_F2) ,FloatReg 2 #endif -#ifdef REG_D2 +#if defined(REG_D2) ,DoubleReg 2 #endif -#ifdef REG_XMM2 +#if defined(REG_XMM2) ,XmmReg 2 #endif -#ifdef REG_YMM2 +#if defined(REG_YMM2) ,YmmReg 2 #endif -#ifdef REG_ZMM2 +#if defined(REG_ZMM2) ,ZmmReg 2 #endif -#ifdef REG_F3 +#if defined(REG_F3) ,FloatReg 3 #endif -#ifdef REG_D3 +#if defined(REG_D3) ,DoubleReg 3 #endif -#ifdef REG_XMM3 +#if defined(REG_XMM3) ,XmmReg 3 #endif -#ifdef REG_YMM3 +#if defined(REG_YMM3) ,YmmReg 3 #endif -#ifdef REG_ZMM3 +#if defined(REG_ZMM3) ,ZmmReg 3 #endif -#ifdef REG_F4 +#if defined(REG_F4) ,FloatReg 4 #endif -#ifdef REG_D4 +#if defined(REG_D4) ,DoubleReg 4 #endif -#ifdef REG_XMM4 +#if defined(REG_XMM4) ,XmmReg 4 #endif -#ifdef REG_YMM4 +#if defined(REG_YMM4) ,YmmReg 4 #endif -#ifdef REG_ZMM4 +#if defined(REG_ZMM4) ,ZmmReg 4 #endif -#ifdef REG_F5 +#if defined(REG_F5) ,FloatReg 5 #endif -#ifdef REG_D5 +#if defined(REG_D5) ,DoubleReg 5 #endif -#ifdef REG_XMM5 +#if defined(REG_XMM5) ,XmmReg 5 #endif -#ifdef REG_YMM5 +#if defined(REG_YMM5) ,YmmReg 5 #endif -#ifdef REG_ZMM5 +#if defined(REG_ZMM5) ,ZmmReg 5 #endif -#ifdef REG_F6 +#if defined(REG_F6) ,FloatReg 6 #endif -#ifdef REG_D6 +#if defined(REG_D6) ,DoubleReg 6 #endif -#ifdef REG_XMM6 +#if defined(REG_XMM6) ,XmmReg 6 #endif -#ifdef REG_YMM6 +#if defined(REG_YMM6) ,YmmReg 6 #endif -#ifdef REG_ZMM6 +#if defined(REG_ZMM6) ,ZmmReg 6 #endif #else /* MAX_REAL_XMM_REG == 0 */ -#ifdef REG_F1 +#if defined(REG_F1) ,FloatReg 1 #endif -#ifdef REG_F2 +#if defined(REG_F2) ,FloatReg 2 #endif -#ifdef REG_F3 +#if defined(REG_F3) ,FloatReg 3 #endif -#ifdef REG_F4 +#if defined(REG_F4) ,FloatReg 4 #endif -#ifdef REG_F5 +#if defined(REG_F5) ,FloatReg 5 #endif -#ifdef REG_F6 +#if defined(REG_F6) ,FloatReg 6 #endif -#ifdef REG_D1 +#if defined(REG_D1) ,DoubleReg 1 #endif -#ifdef REG_D2 +#if defined(REG_D2) ,DoubleReg 2 #endif -#ifdef REG_D3 +#if defined(REG_D3) ,DoubleReg 3 #endif -#ifdef REG_D4 +#if defined(REG_D4) ,DoubleReg 4 #endif -#ifdef REG_D5 +#if defined(REG_D5) ,DoubleReg 5 #endif -#ifdef REG_D6 +#if defined(REG_D6) ,DoubleReg 6 #endif #endif /* MAX_REAL_XMM_REG == 0 */ ] haveRegBase :: Bool -#ifdef REG_Base +#if defined(REG_Base) haveRegBase = True #else haveRegBase = False @@ -636,58 +636,58 @@ globalRegMaybe :: GlobalReg -> Maybe RealReg #if defined(MACHREGS_i386) || defined(MACHREGS_x86_64) \ || defined(MACHREGS_sparc) || defined(MACHREGS_powerpc) \ || defined(MACHREGS_arm) || defined(MACHREGS_aarch64) -# ifdef REG_Base +# if defined(REG_Base) globalRegMaybe BaseReg = Just (RealRegSingle REG_Base) # endif -# ifdef REG_R1 +# if defined(REG_R1) globalRegMaybe (VanillaReg 1 _) = Just (RealRegSingle REG_R1) # endif -# ifdef REG_R2 +# if defined(REG_R2) globalRegMaybe (VanillaReg 2 _) = Just (RealRegSingle REG_R2) # endif -# ifdef REG_R3 +# if defined(REG_R3) globalRegMaybe (VanillaReg 3 _) = Just (RealRegSingle REG_R3) # endif -# ifdef REG_R4 +# if defined(REG_R4) globalRegMaybe (VanillaReg 4 _) = Just (RealRegSingle REG_R4) # endif -# ifdef REG_R5 +# if defined(REG_R5) globalRegMaybe (VanillaReg 5 _) = Just (RealRegSingle REG_R5) # endif -# ifdef REG_R6 +# if defined(REG_R6) globalRegMaybe (VanillaReg 6 _) = Just (RealRegSingle REG_R6) # endif -# ifdef REG_R7 +# if defined(REG_R7) globalRegMaybe (VanillaReg 7 _) = Just (RealRegSingle REG_R7) # endif -# ifdef REG_R8 +# if defined(REG_R8) globalRegMaybe (VanillaReg 8 _) = Just (RealRegSingle REG_R8) # endif -# ifdef REG_R9 +# if defined(REG_R9) globalRegMaybe (VanillaReg 9 _) = Just (RealRegSingle REG_R9) # endif -# ifdef REG_R10 +# if defined(REG_R10) globalRegMaybe (VanillaReg 10 _) = Just (RealRegSingle REG_R10) # endif -# ifdef REG_F1 +# if defined(REG_F1) globalRegMaybe (FloatReg 1) = Just (RealRegSingle REG_F1) # endif -# ifdef REG_F2 +# if defined(REG_F2) globalRegMaybe (FloatReg 2) = Just (RealRegSingle REG_F2) # endif -# ifdef REG_F3 +# if defined(REG_F3) globalRegMaybe (FloatReg 3) = Just (RealRegSingle REG_F3) # endif -# ifdef REG_F4 +# if defined(REG_F4) globalRegMaybe (FloatReg 4) = Just (RealRegSingle REG_F4) # endif -# ifdef REG_F5 +# if defined(REG_F5) globalRegMaybe (FloatReg 5) = Just (RealRegSingle REG_F5) # endif -# ifdef REG_F6 +# if defined(REG_F6) globalRegMaybe (FloatReg 6) = Just (RealRegSingle REG_F6) # endif -# ifdef REG_D1 +# if defined(REG_D1) globalRegMaybe (DoubleReg 1) = # if defined(MACHREGS_sparc) Just (RealRegPair REG_D1 (REG_D1 + 1)) @@ -695,7 +695,7 @@ globalRegMaybe (DoubleReg 1) = Just (RealRegSingle REG_D1) # endif # endif -# ifdef REG_D2 +# if defined(REG_D2) globalRegMaybe (DoubleReg 2) = # if defined(MACHREGS_sparc) Just (RealRegPair REG_D2 (REG_D2 + 1)) @@ -703,7 +703,7 @@ globalRegMaybe (DoubleReg 2) = Just (RealRegSingle REG_D2) # endif # endif -# ifdef REG_D3 +# if defined(REG_D3) globalRegMaybe (DoubleReg 3) = # if defined(MACHREGS_sparc) Just (RealRegPair REG_D3 (REG_D3 + 1)) @@ -711,7 +711,7 @@ globalRegMaybe (DoubleReg 3) = Just (RealRegSingle REG_D3) # endif # endif -# ifdef REG_D4 +# if defined(REG_D4) globalRegMaybe (DoubleReg 4) = # if defined(MACHREGS_sparc) Just (RealRegPair REG_D4 (REG_D4 + 1)) @@ -719,7 +719,7 @@ globalRegMaybe (DoubleReg 4) = Just (RealRegSingle REG_D4) # endif # endif -# ifdef REG_D5 +# if defined(REG_D5) globalRegMaybe (DoubleReg 5) = # if defined(MACHREGS_sparc) Just (RealRegPair REG_D5 (REG_D5 + 1)) @@ -727,7 +727,7 @@ globalRegMaybe (DoubleReg 5) = Just (RealRegSingle REG_D5) # endif # endif -# ifdef REG_D6 +# if defined(REG_D6) globalRegMaybe (DoubleReg 6) = # if defined(MACHREGS_sparc) Just (RealRegPair REG_D6 (REG_D6 + 1)) @@ -736,90 +736,90 @@ globalRegMaybe (DoubleReg 6) = # endif # endif # if MAX_REAL_XMM_REG != 0 -# ifdef REG_XMM1 +# if defined(REG_XMM1) globalRegMaybe (XmmReg 1) = Just (RealRegSingle REG_XMM1) # endif -# ifdef REG_XMM2 +# if defined(REG_XMM2) globalRegMaybe (XmmReg 2) = Just (RealRegSingle REG_XMM2) # endif -# ifdef REG_XMM3 +# if defined(REG_XMM3) globalRegMaybe (XmmReg 3) = Just (RealRegSingle REG_XMM3) # endif -# ifdef REG_XMM4 +# if defined(REG_XMM4) globalRegMaybe (XmmReg 4) = Just (RealRegSingle REG_XMM4) # endif -# ifdef REG_XMM5 +# if defined(REG_XMM5) globalRegMaybe (XmmReg 5) = Just (RealRegSingle REG_XMM5) # endif -# ifdef REG_XMM6 +# if defined(REG_XMM6) globalRegMaybe (XmmReg 6) = Just (RealRegSingle REG_XMM6) # endif # endif # if defined(MAX_REAL_YMM_REG) && MAX_REAL_YMM_REG != 0 -# ifdef REG_YMM1 +# if defined(REG_YMM1) globalRegMaybe (YmmReg 1) = Just (RealRegSingle REG_YMM1) # endif -# ifdef REG_YMM2 +# if defined(REG_YMM2) globalRegMaybe (YmmReg 2) = Just (RealRegSingle REG_YMM2) # endif -# ifdef REG_YMM3 +# if defined(REG_YMM3) globalRegMaybe (YmmReg 3) = Just (RealRegSingle REG_YMM3) # endif -# ifdef REG_YMM4 +# if defined(REG_YMM4) globalRegMaybe (YmmReg 4) = Just (RealRegSingle REG_YMM4) # endif -# ifdef REG_YMM5 +# if defined(REG_YMM5) globalRegMaybe (YmmReg 5) = Just (RealRegSingle REG_YMM5) # endif -# ifdef REG_YMM6 +# if defined(REG_YMM6) globalRegMaybe (YmmReg 6) = Just (RealRegSingle REG_YMM6) # endif # endif # if defined(MAX_REAL_ZMM_REG) && MAX_REAL_ZMM_REG != 0 -# ifdef REG_ZMM1 +# if defined(REG_ZMM1) globalRegMaybe (ZmmReg 1) = Just (RealRegSingle REG_ZMM1) # endif -# ifdef REG_ZMM2 +# if defined(REG_ZMM2) globalRegMaybe (ZmmReg 2) = Just (RealRegSingle REG_ZMM2) # endif -# ifdef REG_ZMM3 +# if defined(REG_ZMM3) globalRegMaybe (ZmmReg 3) = Just (RealRegSingle REG_ZMM3) # endif -# ifdef REG_ZMM4 +# if defined(REG_ZMM4) globalRegMaybe (ZmmReg 4) = Just (RealRegSingle REG_ZMM4) # endif -# ifdef REG_ZMM5 +# if defined(REG_ZMM5) globalRegMaybe (ZmmReg 5) = Just (RealRegSingle REG_ZMM5) # endif -# ifdef REG_ZMM6 +# if defined(REG_ZMM6) globalRegMaybe (ZmmReg 6) = Just (RealRegSingle REG_ZMM6) # endif # endif -# ifdef REG_Sp +# if defined(REG_Sp) globalRegMaybe Sp = Just (RealRegSingle REG_Sp) # endif -# ifdef REG_Lng1 +# if defined(REG_Lng1) globalRegMaybe (LongReg 1) = Just (RealRegSingle REG_Lng1) # endif -# ifdef REG_Lng2 +# if defined(REG_Lng2) globalRegMaybe (LongReg 2) = Just (RealRegSingle REG_Lng2) # endif -# ifdef REG_SpLim +# if defined(REG_SpLim) globalRegMaybe SpLim = Just (RealRegSingle REG_SpLim) # endif -# ifdef REG_Hp +# if defined(REG_Hp) globalRegMaybe Hp = Just (RealRegSingle REG_Hp) # endif -# ifdef REG_HpLim +# if defined(REG_HpLim) globalRegMaybe HpLim = Just (RealRegSingle REG_HpLim) # endif -# ifdef REG_CurrentTSO +# if defined(REG_CurrentTSO) globalRegMaybe CurrentTSO = Just (RealRegSingle REG_CurrentTSO) # endif -# ifdef REG_CurrentNursery +# if defined(REG_CurrentNursery) globalRegMaybe CurrentNursery = Just (RealRegSingle REG_CurrentNursery) # endif -# ifdef REG_MachSp +# if defined(REG_MachSp) globalRegMaybe MachSp = Just (RealRegSingle REG_MachSp) # endif globalRegMaybe _ = Nothing @@ -860,19 +860,19 @@ Hence, on x86 esi and edi are treated as not allocatable. freeReg r = freeRegBase r freeRegBase :: RegNo -> Bool -# ifdef REG_Base +# if defined(REG_Base) freeRegBase REG_Base = False # endif -# ifdef REG_Sp +# if defined(REG_Sp) freeRegBase REG_Sp = False # endif -# ifdef REG_SpLim +# if defined(REG_SpLim) freeRegBase REG_SpLim = False # endif -# ifdef REG_Hp +# if defined(REG_Hp) freeRegBase REG_Hp = False # endif -# ifdef REG_HpLim +# if defined(REG_HpLim) freeRegBase REG_HpLim = False # endif -- All other regs are considered to be "free", because we can track @@ -901,88 +901,88 @@ freeReg 30 = False -} # endif -# ifdef REG_Base +# if defined(REG_Base) freeReg REG_Base = False # endif -# ifdef REG_R1 +# if defined(REG_R1) freeReg REG_R1 = False # endif -# ifdef REG_R2 +# if defined(REG_R2) freeReg REG_R2 = False # endif -# ifdef REG_R3 +# if defined(REG_R3) freeReg REG_R3 = False # endif -# ifdef REG_R4 +# if defined(REG_R4) freeReg REG_R4 = False # endif -# ifdef REG_R5 +# if defined(REG_R5) freeReg REG_R5 = False # endif -# ifdef REG_R6 +# if defined(REG_R6) freeReg REG_R6 = False # endif -# ifdef REG_R7 +# if defined(REG_R7) freeReg REG_R7 = False # endif -# ifdef REG_R8 +# if defined(REG_R8) freeReg REG_R8 = False # endif -# ifdef REG_R9 +# if defined(REG_R9) freeReg REG_R9 = False # endif -# ifdef REG_R10 +# if defined(REG_R10) freeReg REG_R10 = False # endif -# ifdef REG_F1 +# if defined(REG_F1) freeReg REG_F1 = False # endif -# ifdef REG_F2 +# if defined(REG_F2) freeReg REG_F2 = False # endif -# ifdef REG_F3 +# if defined(REG_F3) freeReg REG_F3 = False # endif -# ifdef REG_F4 +# if defined(REG_F4) freeReg REG_F4 = False # endif -# ifdef REG_F5 +# if defined(REG_F5) freeReg REG_F5 = False # endif -# ifdef REG_F6 +# if defined(REG_F6) freeReg REG_F6 = False # endif -# ifdef REG_D1 +# if defined(REG_D1) freeReg REG_D1 = False # endif -# ifdef REG_D2 +# if defined(REG_D2) freeReg REG_D2 = False # endif -# ifdef REG_D3 +# if defined(REG_D3) freeReg REG_D3 = False # endif -# ifdef REG_D4 +# if defined(REG_D4) freeReg REG_D4 = False # endif -# ifdef REG_D5 +# if defined(REG_D5) freeReg REG_D5 = False # endif -# ifdef REG_D6 +# if defined(REG_D6) freeReg REG_D6 = False # endif -# ifdef REG_Sp +# if defined(REG_Sp) freeReg REG_Sp = False # endif -# ifdef REG_Su +# if defined(REG_Su) freeReg REG_Su = False # endif -# ifdef REG_SpLim +# if defined(REG_SpLim) freeReg REG_SpLim = False # endif -# ifdef REG_Hp +# if defined(REG_Hp) freeReg REG_Hp = False # endif -# ifdef REG_HpLim +# if defined(REG_HpLim) freeReg REG_HpLim = False # endif freeReg _ = True @@ -1029,106 +1029,106 @@ freeReg regNo = False -} -# ifdef REG_Base +# if defined(REG_Base) freeReg REG_Base = False # endif -# ifdef REG_R1 +# if defined(REG_R1) freeReg REG_R1 = False # endif -# ifdef REG_R2 +# if defined(REG_R2) freeReg REG_R2 = False # endif -# ifdef REG_R3 +# if defined(REG_R3) freeReg REG_R3 = False # endif -# ifdef REG_R4 +# if defined(REG_R4) freeReg REG_R4 = False # endif -# ifdef REG_R5 +# if defined(REG_R5) freeReg REG_R5 = False # endif -# ifdef REG_R6 +# if defined(REG_R6) freeReg REG_R6 = False # endif -# ifdef REG_R7 +# if defined(REG_R7) freeReg REG_R7 = False # endif -# ifdef REG_R8 +# if defined(REG_R8) freeReg REG_R8 = False # endif -# ifdef REG_R9 +# if defined(REG_R9) freeReg REG_R9 = False # endif -# ifdef REG_R10 +# if defined(REG_R10) freeReg REG_R10 = False # endif -# ifdef REG_F1 +# if defined(REG_F1) freeReg REG_F1 = False # endif -# ifdef REG_F2 +# if defined(REG_F2) freeReg REG_F2 = False # endif -# ifdef REG_F3 +# if defined(REG_F3) freeReg REG_F3 = False # endif -# ifdef REG_F4 +# if defined(REG_F4) freeReg REG_F4 = False # endif -# ifdef REG_F5 +# if defined(REG_F5) freeReg REG_F5 = False # endif -# ifdef REG_F6 +# if defined(REG_F6) freeReg REG_F6 = False # endif -# ifdef REG_D1 +# if defined(REG_D1) freeReg REG_D1 = False # endif -# ifdef REG_D1_2 +# if defined(REG_D1_2) freeReg REG_D1_2 = False # endif -# ifdef REG_D2 +# if defined(REG_D2) freeReg REG_D2 = False # endif -# ifdef REG_D2_2 +# if defined(REG_D2_2) freeReg REG_D2_2 = False # endif -# ifdef REG_D3 +# if defined(REG_D3) freeReg REG_D3 = False # endif -# ifdef REG_D3_2 +# if defined(REG_D3_2) freeReg REG_D3_2 = False # endif -# ifdef REG_D4 +# if defined(REG_D4) freeReg REG_D4 = False # endif -# ifdef REG_D4_2 +# if defined(REG_D4_2) freeReg REG_D4_2 = False # endif -# ifdef REG_D5 +# if defined(REG_D5) freeReg REG_D5 = False # endif -# ifdef REG_D5_2 +# if defined(REG_D5_2) freeReg REG_D5_2 = False # endif -# ifdef REG_D6 +# if defined(REG_D6) freeReg REG_D6 = False # endif -# ifdef REG_D6_2 +# if defined(REG_D6_2) freeReg REG_D6_2 = False # endif -# ifdef REG_Sp +# if defined(REG_Sp) freeReg REG_Sp = False # endif -# ifdef REG_Su +# if defined(REG_Su) freeReg REG_Su = False # endif -# ifdef REG_SpLim +# if defined(REG_SpLim) freeReg REG_SpLim = False # endif -# ifdef REG_Hp +# if defined(REG_Hp) freeReg REG_Hp = False # endif -# ifdef REG_HpLim +# if defined(REG_HpLim) freeReg REG_HpLim = False # endif freeReg _ = True |