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authorRoman Leshchinskiy <rl@cse.unsw.edu.au>2006-08-25 10:17:53 +0000
committerRoman Leshchinskiy <rl@cse.unsw.edu.au>2006-08-25 10:17:53 +0000
commit846f2649419f6d008b7f14f855e51cbc112960b3 (patch)
treeb6fa9fb0c3e54b5b3c9597fd6b03f5609ea25141 /includes/SMP.h
parent1777f480284b6700827951b7b8d80f179eedc84e (diff)
downloadhaskell-846f2649419f6d008b7f14f855e51cbc112960b3.tar.gz
Add atomic SMP primitives for the Sparc
Diffstat (limited to 'includes/SMP.h')
-rw-r--r--includes/SMP.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/includes/SMP.h b/includes/SMP.h
index 91ffc22383..af4174fca6 100644
--- a/includes/SMP.h
+++ b/includes/SMP.h
@@ -48,6 +48,13 @@ xchg(StgPtr p, StgWord w)
:"=r" (result)
:"r" (w), "r" (p)
);
+#elif sparc_HOST_ARCH
+ result = w;
+ __asm__ __volatile__ (
+ "swap %1,%0"
+ : "+r" (result), "+m" (*p)
+ : /* no input-only operands */
+ );
#elif !defined(WITHSMP)
result = *p;
*p = w;
@@ -84,6 +91,14 @@ cas(StgVolatilePtr p, StgWord o, StgWord n)
:"cc", "memory"
);
return result;
+#elif sparc_HOST_ARCH
+ __asm__ __volatile__ (
+ "cas [%1], %2, %0"
+ : "+r" (n)
+ : "r" (p), "r" (o)
+ : "memory"
+ );
+ return n;
#elif !defined(WITHSMP)
StgWord result;
result = *p;
@@ -112,6 +127,9 @@ write_barrier(void) {
__asm__ __volatile__ ("" : : : "memory");
#elif powerpc_HOST_ARCH
__asm__ __volatile__ ("lwsync" : : : "memory");
+#elif sparc_HOST_ARCH
+ /* Sparc in TSO mode does not require write/write barriers. */
+ __asm__ __volatile__ ("" : : : "memory");
#elif !defined(WITHSMP)
return;
#else