Revert "Enable new warning for fragile/incorrect CPP #if usage"

This is causing too much platform dependent breakage at the moment. We
will need a more rigorous testing strategy before this can be
merged again.

This reverts commit 7e340c2bbf4a56959bd1e95cdd1cfdb2b7e537c2.

4 files changed, 40 insertions, 83 deletions

diff --git a/includes/stg/HaskellMachRegs.h b/includes/stg/HaskellMachRegs.h
index 00199d7858..e95cefd822 100644
--- a/includes/stg/HaskellMachRegs.h
+++ b/includes/stg/HaskellMachRegs.h
@@ -33,34 +33,14 @@
 
 #define MACHREGS_NO_REGS 0
 
-#ifdef i386_TARGET_ARCH
-#define MACHREGS_i386     1
-#endif
-
-#ifdef x86_64_TARGET_ARCH
-#define MACHREGS_x86_64   1
-#endif
-
-#if defined(powerpc_TARGET_ARCH) || defined(powerpc64_TARGET_ARCH) \
-            || defined(powerpc64le_TARGET_ARCH) || defined(rs6000_TARGET_ARCH)
-#define MACHREGS_powerpc  1
-#endif
-
-#ifdef sparc_TARGET_ARCH
-#define MACHREGS_sparc    1
-#endif
-
-#ifdef arm_TARGET_ARCH
-#define MACHREGS_arm      1
-#endif
-
-#ifdef aarch64_TARGET_ARCH
-#define MACHREGS_aarch64  1
-#endif
-
-#ifdef darwin_TARGET_OS
-#define MACHREGS_darwin   1
-#endif
+#define MACHREGS_i386     i386_TARGET_ARCH
+#define MACHREGS_x86_64   x86_64_TARGET_ARCH
+#define MACHREGS_powerpc  (powerpc_TARGET_ARCH || powerpc64_TARGET_ARCH \
+                || powerpc64le_TARGET_ARCH || rs6000_TARGET_ARCH)
+#define MACHREGS_sparc    sparc_TARGET_ARCH
+#define MACHREGS_arm      arm_TARGET_ARCH
+#define MACHREGS_aarch64  aarch64_TARGET_ARCH
+#define MACHREGS_darwin   darwin_TARGET_OS
 
 #endif
 
diff --git a/includes/stg/MachRegs.h b/includes/stg/MachRegs.h
index bed6b90324..232ce03810 100644
--- a/includes/stg/MachRegs.h
+++ b/includes/stg/MachRegs.h
@@ -82,7 +82,7 @@
    Leaving SpLim out of the picture.
    -------------------------------------------------------------------------- */
 
-#ifdef MACHREGS_i386
+#if MACHREGS_i386
 
 #define REG(x) __asm__("%" #x)
 
@@ -156,7 +156,7 @@
 
   --------------------------------------------------------------------------- */
 
-#elif defined(MACHREGS_x86_64)
+#elif MACHREGS_x86_64
 
 #define REG(x) __asm__("%" #x)
 
@@ -303,7 +303,7 @@ the stack. See Note [Overlapping global registers] for implications.
    We can do the Whole Business with callee-save registers only!
    -------------------------------------------------------------------------- */
 
-#elif defined(MACHREGS_powerpc)
+#elif MACHREGS_powerpc
 
 #define REG(x) __asm__(#x)
 
@@ -316,7 +316,7 @@ the stack. See Note [Overlapping global registers] for implications.
 #define REG_R7          r20
 #define REG_R8          r21
 
-#ifdef MACHREGS_darwin
+#if MACHREGS_darwin
 
 #define REG_F1          f14
 #define REG_F2          f15
@@ -442,7 +442,7 @@ the stack. See Note [Overlapping global registers] for implications.
 
    -------------------------------------------------------------------------- */
 
-#elif defined(MACHREGS_sparc)
+#elif MACHREGS_sparc
 
 #define REG(x) __asm__("%" #x)
 
@@ -521,7 +521,7 @@ the stack. See Note [Overlapping global registers] for implications.
    d16-d31/q8-q15        Argument / result/ scratch registers
    ----------------------------------------------------------------------------- */
 
-#elif defined(MACHREGS_arm)
+#elif MACHREGS_arm
 
 #define REG(x) __asm__(#x)
 
@@ -578,7 +578,7 @@ the stack. See Note [Overlapping global registers] for implications.
 
    ----------------------------------------------------------------------------- */
 
-#elif defined(MACHREGS_aarch64)
+#elif MACHREGS_aarch64
 
 #define REG(x) __asm__(#x)
 
diff --git a/includes/stg/RtsMachRegs.h b/includes/stg/RtsMachRegs.h
index e6298cf8c9..29262dc17a 100644
--- a/includes/stg/RtsMachRegs.h
+++ b/includes/stg/RtsMachRegs.h
@@ -39,34 +39,14 @@
 
 #define MACHREGS_NO_REGS 0
 
-#ifdef i386_HOST_ARCH
-#define MACHREGS_i386     1
-#endif
-
-#ifdef x86_64_HOST_ARCH
-#define MACHREGS_x86_64   1
-#endif
-
-#if defined(powerpc_HOST_ARCH) || defined(powerpc64_HOST_ARCH) \
-        || defined(powerpc64le_HOST_ARCH) || defined(rs6000_HOST_ARCH)
-#define MACHREGS_powerpc  1
-#endif
-
-#ifdef sparc_HOST_ARCH
-#define MACHREGS_sparc    1
-#endif
-
-#ifdef arm_HOST_ARCH
-#define MACHREGS_arm      1
-#endif
-
-#ifdef aarch64_HOST_ARCH
-#define MACHREGS_aarch64  1
-#endif
-
-#ifdef darwin_HOST_OS
-#define MACHREGS_darwin   1
-#endif
+#define MACHREGS_i386     i386_HOST_ARCH
+#define MACHREGS_x86_64   x86_64_HOST_ARCH
+#define MACHREGS_powerpc  (powerpc_HOST_ARCH || powerpc64_HOST_ARCH \
+        || powerpc64le_HOST_ARCH || rs6000_HOST_ARCH)
+#define MACHREGS_sparc    sparc_HOST_ARCH
+#define MACHREGS_arm      arm_HOST_ARCH
+#define MACHREGS_aarch64  aarch64_HOST_ARCH
+#define MACHREGS_darwin   darwin_HOST_OS
 
 #endif
 
diff --git a/includes/stg/SMP.h b/includes/stg/SMP.h
index 21ab0e1214..0e806b6716 100644
--- a/includes/stg/SMP.h
+++ b/includes/stg/SMP.h
@@ -14,7 +14,7 @@
 #ifndef SMP_H
 #define SMP_H
 
-#if defined(arm_HOST_ARCH) && defined(arm_HOST_ARCH_PRE_ARMv6)
+#if arm_HOST_ARCH && defined(arm_HOST_ARCH_PRE_ARMv6)
 void arm_atomic_spin_lock(void);
 void arm_atomic_spin_unlock(void);
 #endif
@@ -187,15 +187,14 @@ EXTERN_INLINE void
 write_barrier(void) {
 #if defined(NOSMP)
     return;
-#elif defined(i386_HOST_ARCH) || defined(x86_64_HOST_ARCH)
+#elif i386_HOST_ARCH || x86_64_HOST_ARCH
     __asm__ __volatile__ ("" : : : "memory");
-#elif defined(powerpc_HOST_ARCH) || defined(powerpc64_HOST_ARCH) \
-    || defined(powerpc64le_HOST_ARCH)
+#elif powerpc_HOST_ARCH || powerpc64_HOST_ARCH || powerpc64le_HOST_ARCH
     __asm__ __volatile__ ("lwsync" : : : "memory");
-#elif defined(sparc_HOST_ARCH)
+#elif sparc_HOST_ARCH
     /* Sparc in TSO mode does not require store/store barriers. */
     __asm__ __volatile__ ("" : : : "memory");
-#elif defined(arm_HOST_ARCH) || defined(aarch64_HOST_ARCH)
+#elif (arm_HOST_ARCH) || aarch64_HOST_ARCH
     __asm__ __volatile__ ("dmb  st" : : : "memory");
 #else
 #error memory barriers unimplemented on this architecture
@@ -206,18 +205,17 @@ EXTERN_INLINE void
 store_load_barrier(void) {
 #if defined(NOSMP)
     return;
-#elif defined(i386_HOST_ARCH)
+#elif i386_HOST_ARCH
     __asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory");
-#elif defined(x86_64_HOST_ARCH)
+#elif x86_64_HOST_ARCH
     __asm__ __volatile__ ("lock; addq $0,0(%%rsp)" : : : "memory");
-#elif defined(powerpc_HOST_ARCH) || defined(powerpc64_HOST_ARCH) \
-    || defined(powerpc64le_HOST_ARCH)
+#elif powerpc_HOST_ARCH || powerpc64_HOST_ARCH || powerpc64le_HOST_ARCH
     __asm__ __volatile__ ("sync" : : : "memory");
-#elif defined(sparc_HOST_ARCH)
+#elif sparc_HOST_ARCH
     __asm__ __volatile__ ("membar #StoreLoad" : : : "memory");
-#elif defined(arm_HOST_ARCH)
+#elif arm_HOST_ARCH
     __asm__ __volatile__ ("dmb" : : : "memory");
-#elif defined(aarch64_HOST_ARCH)
+#elif aarch64_HOST_ARCH
     __asm__ __volatile__ ("dmb sy" : : : "memory");
 #else
 #error memory barriers unimplemented on this architecture
@@ -228,19 +226,18 @@ EXTERN_INLINE void
 load_load_barrier(void) {
 #if defined(NOSMP)
     return;
-#elif defined(i386_HOST_ARCH)
+#elif i386_HOST_ARCH
     __asm__ __volatile__ ("" : : : "memory");
-#elif defined(x86_64_HOST_ARCH)
+#elif x86_64_HOST_ARCH
     __asm__ __volatile__ ("" : : : "memory");
-#elif defined(powerpc_HOST_ARCH) || defined(powerpc64_HOST_ARCH) \
-    || defined(powerpc64le_HOST_ARCH)
+#elif powerpc_HOST_ARCH || powerpc64_HOST_ARCH || powerpc64le_HOST_ARCH
     __asm__ __volatile__ ("lwsync" : : : "memory");
-#elif defined(sparc_HOST_ARCH)
+#elif sparc_HOST_ARCH
     /* Sparc in TSO mode does not require load/load barriers. */
     __asm__ __volatile__ ("" : : : "memory");
-#elif defined(arm_HOST_ARCH)
+#elif arm_HOST_ARCH
     __asm__ __volatile__ ("dmb" : : : "memory");
-#elif defined(aarch64_HOST_ARCH)
+#elif aarch64_HOST_ARCH
     __asm__ __volatile__ ("dmb sy" : : : "memory");
 #else
 #error memory barriers unimplemented on this architecture