Enable new warning for fragile/incorrect CPP #if usage

The C code in the RTS now gets built with `-Wundef` and the Haskell code
(stages 1 and 2 only) with `-Wcpp-undef`. We now get warnings whereever
`#if` is used on undefined identifiers.

Test Plan: Validate on Linux and Windows

Reviewers: austin, angerman, simonmar, bgamari, Phyx

Reviewed By: bgamari

Subscribers: thomie, snowleopard

Differential Revision: https://phabricator.haskell.org/D3278

7 files changed, 116 insertions, 69 deletions

diff --git a/includes/CodeGen.Platform.hs b/includes/CodeGen.Platform.hs
index 3674ea6f95..97628aecdc 100644
--- a/includes/CodeGen.Platform.hs
+++ b/includes/CodeGen.Platform.hs
@@ -1,6 +1,7 @@
 
 import CmmExpr
-#if !(MACHREGS_i386 || MACHREGS_x86_64 || MACHREGS_sparc || MACHREGS_powerpc)
+#if !(defined(MACHREGS_i386) || defined(MACHREGS_x86_64) \
+    || defined(MACHREGS_sparc) || defined(MACHREGS_powerpc))
 import Panic
 #endif
 import Reg
@@ -8,9 +9,9 @@ import Reg
 #include "ghcautoconf.h"
 #include "stg/MachRegs.h"
 
-#if MACHREGS_i386 || MACHREGS_x86_64
+#if defined(MACHREGS_i386) || defined(MACHREGS_x86_64)
 
-# if MACHREGS_i386
+# if defined(MACHREGS_i386)
 #  define eax 0
 #  define ebx 1
 #  define ecx 2
@@ -21,7 +22,7 @@ import Reg
 #  define esp 7
 # endif
 
-# if MACHREGS_x86_64
+# if defined(MACHREGS_x86_64)
 #  define rax   0
 #  define rbx   1
 #  define rcx   2
@@ -103,7 +104,8 @@ import Reg
 -- I'm not sure if these are the correct numberings.
 -- Normally, the register names are just stringified as part of the REG() macro
 
-#elif MACHREGS_powerpc || MACHREGS_arm || MACHREGS_aarch64
+#elif defined(MACHREGS_powerpc) || defined(MACHREGS_arm) \
+    || defined(MACHREGS_aarch64)
 
 # define r0 0
 # define r1 1
@@ -140,7 +142,7 @@ import Reg
 
 -- See note above. These aren't actually used for anything except satisfying the compiler for globalRegMaybe
 -- so I'm unsure if they're the correct numberings, should they ever be attempted to be used in the NCG.
-#if MACHREGS_aarch64 || MACHREGS_arm
+#if defined(MACHREGS_aarch64) || defined(MACHREGS_arm)
 # define s0 32
 # define s1 33
 # define s2 34
@@ -208,7 +210,7 @@ import Reg
 # define d31 63
 #endif
 
-# if MACHREGS_darwin
+# if defined(MACHREGS_darwin)
 #  define f0  32
 #  define f1  33
 #  define f2  34
@@ -276,7 +278,7 @@ import Reg
 #  define fr31 63
 # endif
 
-#elif MACHREGS_sparc
+#elif defined(MACHREGS_sparc)
 
 # define g0  0
 # define g1  1
@@ -631,7 +633,9 @@ haveRegBase = False
 -- in a real machine register, otherwise returns @'Just' reg@, where
 -- reg is the machine register it is stored in.
 globalRegMaybe :: GlobalReg -> Maybe RealReg
-#if MACHREGS_i386 || MACHREGS_x86_64 || MACHREGS_sparc || MACHREGS_powerpc || MACHREGS_arm || MACHREGS_aarch64
+#if defined(MACHREGS_i386) || defined(MACHREGS_x86_64) \
+    || defined(MACHREGS_sparc) || defined(MACHREGS_powerpc) \
+    || defined(MACHREGS_arm) || defined(MACHREGS_aarch64)
 # ifdef REG_Base
 globalRegMaybe BaseReg                  = Just (RealRegSingle REG_Base)
 # endif
@@ -685,7 +689,7 @@ globalRegMaybe (FloatReg 6)             = Just (RealRegSingle REG_F6)
 # endif
 # ifdef REG_D1
 globalRegMaybe (DoubleReg 1)            =
-#  if MACHREGS_sparc
+#  if defined(MACHREGS_sparc)
                                           Just (RealRegPair REG_D1 (REG_D1 + 1))
 #  else
                                           Just (RealRegSingle REG_D1)
@@ -693,7 +697,7 @@ globalRegMaybe (DoubleReg 1)            =
 # endif
 # ifdef REG_D2
 globalRegMaybe (DoubleReg 2)            =
-#  if MACHREGS_sparc
+#  if defined(MACHREGS_sparc)
                                           Just (RealRegPair REG_D2 (REG_D2 + 1))
 #  else
                                           Just (RealRegSingle REG_D2)
@@ -701,7 +705,7 @@ globalRegMaybe (DoubleReg 2)            =
 # endif
 # ifdef REG_D3
 globalRegMaybe (DoubleReg 3)            =
-#  if MACHREGS_sparc
+#  if defined(MACHREGS_sparc)
                                           Just (RealRegPair REG_D3 (REG_D3 + 1))
 #  else
                                           Just (RealRegSingle REG_D3)
@@ -709,7 +713,7 @@ globalRegMaybe (DoubleReg 3)            =
 # endif
 # ifdef REG_D4
 globalRegMaybe (DoubleReg 4)            =
-#  if MACHREGS_sparc
+#  if defined(MACHREGS_sparc)
                                           Just (RealRegPair REG_D4 (REG_D4 + 1))
 #  else
                                           Just (RealRegSingle REG_D4)
@@ -717,7 +721,7 @@ globalRegMaybe (DoubleReg 4)            =
 # endif
 # ifdef REG_D5
 globalRegMaybe (DoubleReg 5)            =
-#  if MACHREGS_sparc
+#  if defined(MACHREGS_sparc)
                                           Just (RealRegPair REG_D5 (REG_D5 + 1))
 #  else
                                           Just (RealRegSingle REG_D5)
@@ -725,7 +729,7 @@ globalRegMaybe (DoubleReg 5)            =
 # endif
 # ifdef REG_D6
 globalRegMaybe (DoubleReg 6)            =
-#  if MACHREGS_sparc
+#  if defined(MACHREGS_sparc)
                                           Just (RealRegPair REG_D6 (REG_D6 + 1))
 #  else
                                           Just (RealRegSingle REG_D6)
@@ -751,7 +755,7 @@ globalRegMaybe (XmmReg 5)               = Just (RealRegSingle REG_XMM5)
 globalRegMaybe (XmmReg 6)               = Just (RealRegSingle REG_XMM6)
 #  endif
 # endif
-# if MAX_REAL_YMM_REG != 0
+# if defined(MAX_REAL_YMM_REG) && MAX_REAL_YMM_REG != 0
 #  ifdef REG_YMM1
 globalRegMaybe (YmmReg 1)               = Just (RealRegSingle REG_YMM1)
 #  endif
@@ -771,7 +775,7 @@ globalRegMaybe (YmmReg 5)               = Just (RealRegSingle REG_YMM5)
 globalRegMaybe (YmmReg 6)               = Just (RealRegSingle REG_YMM6)
 #  endif
 # endif
-# if MAX_REAL_ZMM_REG != 0
+# if defined(MAX_REAL_ZMM_REG) && MAX_REAL_ZMM_REG != 0
 #  ifdef REG_ZMM1
 globalRegMaybe (ZmmReg 1)               = Just (RealRegSingle REG_ZMM1)
 #  endif
@@ -819,7 +823,7 @@ globalRegMaybe CurrentNursery           = Just (RealRegSingle REG_CurrentNursery
 globalRegMaybe MachSp                   = Just (RealRegSingle REG_MachSp)
 # endif
 globalRegMaybe _                        = Nothing
-#elif MACHREGS_NO_REGS
+#elif defined(MACHREGS_NO_REGS)
 globalRegMaybe _ = Nothing
 #else
 globalRegMaybe = panic "globalRegMaybe not defined for this platform"
@@ -827,14 +831,14 @@ globalRegMaybe = panic "globalRegMaybe not defined for this platform"
 
 freeReg :: RegNo -> Bool
 
-#if MACHREGS_i386 || MACHREGS_x86_64
+#if defined(MACHREGS_i386) || defined(MACHREGS_x86_64)
 
-# if MACHREGS_i386
+# if defined(MACHREGS_i386)
 freeReg esp = False -- %esp is the C stack pointer
 freeReg esi = False -- Note [esi/edi not allocatable]
 freeReg edi = False
 # endif
-# if MACHREGS_x86_64
+# if defined(MACHREGS_x86_64)
 freeReg rsp = False  --        %rsp is the C stack pointer
 # endif
 
@@ -875,14 +879,14 @@ freeRegBase REG_HpLim = False
 -- their liveness accurately.
 freeRegBase _ = True
 
-#elif MACHREGS_powerpc
+#elif defined(MACHREGS_powerpc)
 
 freeReg 0 = False -- Used by code setting the back chain pointer
                   -- in stack reallocations on Linux
                   -- r0 is not usable in all insns so also reserved
                   -- on Darwin.
 freeReg 1 = False -- The Stack Pointer
-# if !MACHREGS_darwin
+# if !defined(MACHREGS_darwin)
 -- most non-darwin powerpc OSes use r2 as a TOC pointer or something like that
 freeReg 2 = False
 freeReg 13 = False -- reserved for system thread ID on 64 bit
@@ -983,7 +987,7 @@ freeReg REG_HpLim = False
 # endif
 freeReg _ = True
 
-#elif MACHREGS_sparc
+#elif defined(MACHREGS_sparc)
 
 -- SPARC regs used by the OS / ABI
 -- %g0(r0) is always zero
diff --git a/includes/Stg.h b/includes/Stg.h
index 063959d880..a0886ef727 100644
--- a/includes/Stg.h
+++ b/includes/Stg.h
@@ -146,7 +146,7 @@
 // to force gnu90-style 'external inline' semantics.
 #if defined(FORCE_GNU_INLINE)
 // disable auto-detection since HAVE_GNU_INLINE has been defined externally
-#elif __GNUC_GNU_INLINE__ && __GNUC__ == 4 && __GNUC_MINOR__ == 2
+#elif defined(__GNUC_GNU_INLINE__) && __GNUC__ == 4 && __GNUC_MINOR__ == 2
 // GCC 4.2.x didn't properly support C99 inline semantics (GCC 4.3 was the first
 // release to properly support C99 inline semantics), and therefore warned when
 // using 'extern inline' while in C99 mode unless `__attributes__((gnu_inline))`
@@ -154,14 +154,14 @@
 # define FORCE_GNU_INLINE 1
 #endif
 
-#if FORCE_GNU_INLINE
+#ifdef FORCE_GNU_INLINE
 // Force compiler into gnu90 semantics
 # if defined(KEEP_INLINES)
 #  define EXTERN_INLINE inline __attribute__((gnu_inline))
 # else
 #  define EXTERN_INLINE extern inline __attribute__((gnu_inline))
 # endif
-#elif __GNUC_GNU_INLINE__
+#elif defined(__GNUC_GNU_INLINE__)
 // we're currently in gnu90 inline mode by default and
 // __attribute__((gnu_inline)) may not be supported, so better leave it off
 # if defined(KEEP_INLINES)
diff --git a/includes/rts/OSThreads.h b/includes/rts/OSThreads.h
index 05e52d919a..520d592ec6 100644
--- a/includes/rts/OSThreads.h
+++ b/includes/rts/OSThreads.h
@@ -16,7 +16,7 @@
 
 #if defined(HAVE_PTHREAD_H) && !defined(mingw32_HOST_OS)
 
-#if CMINUSMINUS
+#ifdef CMINUSMINUS
 
 #define OS_ACQUIRE_LOCK(mutex) foreign "C" pthread_mutex_lock(mutex)
 #define OS_RELEASE_LOCK(mutex) foreign "C" pthread_mutex_unlock(mutex)
@@ -75,7 +75,7 @@ EXTERN_INLINE int TRY_ACQUIRE_LOCK(pthread_mutex_t *mutex)
 
 # elif defined(HAVE_WINDOWS_H)
 
-#if CMINUSMINUS
+#ifdef CMINUSMINUS
 
 /* We jump through a hoop here to get a CCall EnterCriticalSection
    and LeaveCriticalSection, as that's what C-- wants. */
diff --git a/includes/stg/HaskellMachRegs.h b/includes/stg/HaskellMachRegs.h
index 37e687bc4e..89a2b95399 100644
--- a/includes/stg/HaskellMachRegs.h
+++ b/includes/stg/HaskellMachRegs.h
@@ -32,14 +32,34 @@
 
 #define MACHREGS_NO_REGS 0
 
-#define MACHREGS_i386     i386_TARGET_ARCH
-#define MACHREGS_x86_64   x86_64_TARGET_ARCH
-#define MACHREGS_powerpc  (powerpc_TARGET_ARCH || powerpc64_TARGET_ARCH \
-                || powerpc64le_TARGET_ARCH || rs6000_TARGET_ARCH)
-#define MACHREGS_sparc    sparc_TARGET_ARCH
-#define MACHREGS_arm      arm_TARGET_ARCH
-#define MACHREGS_aarch64  aarch64_TARGET_ARCH
-#define MACHREGS_darwin   darwin_TARGET_OS
+#ifdef i386_TARGET_ARCH
+#define MACHREGS_i386     1
+#endif
+
+#ifdef x86_64_TARGET_ARCH
+#define MACHREGS_x86_64   1
+#endif
+
+#if defined(powerpc_TARGET_ARCH) || defined(powerpc64_TARGET_ARCH) \
+            || defined(powerpc64le_TARGET_ARCH) || defined(rs6000_TARGET_ARCH)
+#define MACHREGS_powerpc  1
+#endif
+
+#ifdef sparc_TARGET_ARCH
+#define MACHREGS_sparc    1
+#endif
+
+#ifdef arm_TARGET_ARCH
+#define MACHREGS_arm      1
+#endif
+
+#ifdef aarch64_TARGET_ARCH
+#define MACHREGS_aarch64  1
+#endif
+
+#ifdef darwin_TARGET_OS
+#define MACHREGS_darwin   1
+#endif
 
 #endif
 
diff --git a/includes/stg/MachRegs.h b/includes/stg/MachRegs.h
index a0cf595505..f58e49e626 100644
--- a/includes/stg/MachRegs.h
+++ b/includes/stg/MachRegs.h
@@ -81,7 +81,7 @@
    Leaving SpLim out of the picture.
    -------------------------------------------------------------------------- */
 
-#if MACHREGS_i386
+#ifdef MACHREGS_i386
 
 #define REG(x) __asm__("%" #x)
 
@@ -155,7 +155,7 @@
 
   --------------------------------------------------------------------------- */
 
-#elif MACHREGS_x86_64
+#elif defined(MACHREGS_x86_64)
 
 #define REG(x) __asm__("%" #x)
 
@@ -302,7 +302,7 @@ the stack. See Note [Overlapping global registers] for implications.
    We can do the Whole Business with callee-save registers only!
    -------------------------------------------------------------------------- */
 
-#elif MACHREGS_powerpc
+#elif defined(MACHREGS_powerpc)
 
 #define REG(x) __asm__(#x)
 
@@ -315,7 +315,7 @@ the stack. See Note [Overlapping global registers] for implications.
 #define REG_R7          r20
 #define REG_R8          r21
 
-#if MACHREGS_darwin
+#ifdef MACHREGS_darwin
 
 #define REG_F1          f14
 #define REG_F2          f15
@@ -441,7 +441,7 @@ the stack. See Note [Overlapping global registers] for implications.
 
    -------------------------------------------------------------------------- */
 
-#elif MACHREGS_sparc
+#elif defined(MACHREGS_sparc)
 
 #define REG(x) __asm__("%" #x)
 
@@ -520,7 +520,7 @@ the stack. See Note [Overlapping global registers] for implications.
    d16-d31/q8-q15        Argument / result/ scratch registers
    ----------------------------------------------------------------------------- */
 
-#elif MACHREGS_arm
+#elif defined(MACHREGS_arm)
 
 #define REG(x) __asm__(#x)
 
@@ -577,7 +577,7 @@ the stack. See Note [Overlapping global registers] for implications.
 
    ----------------------------------------------------------------------------- */
 
-#elif MACHREGS_aarch64
+#elif defined(MACHREGS_aarch64)
 
 #define REG(x) __asm__(#x)
 
diff --git a/includes/stg/RtsMachRegs.h b/includes/stg/RtsMachRegs.h
index 5a0464b909..627bdfeebb 100644
--- a/includes/stg/RtsMachRegs.h
+++ b/includes/stg/RtsMachRegs.h
@@ -38,14 +38,34 @@
 
 #define MACHREGS_NO_REGS 0
 
-#define MACHREGS_i386     i386_HOST_ARCH
-#define MACHREGS_x86_64   x86_64_HOST_ARCH
-#define MACHREGS_powerpc  (powerpc_HOST_ARCH || powerpc64_HOST_ARCH \
-        || powerpc64le_HOST_ARCH || rs6000_HOST_ARCH)
-#define MACHREGS_sparc    sparc_HOST_ARCH
-#define MACHREGS_arm      arm_HOST_ARCH
-#define MACHREGS_aarch64  aarch64_HOST_ARCH
-#define MACHREGS_darwin   darwin_HOST_OS
+#ifdef i386_HOST_ARCH
+#define MACHREGS_i386     1
+#endif
+
+#ifdef x86_64_HOST_ARCH
+#define MACHREGS_x86_64   1
+#endif
+
+#if defined(powerpc_HOST_ARCH) || defined(powerpc64_HOST_ARCH) \
+        || defined(powerpc64le_HOST_ARCH) || defined(rs6000_HOST_ARCH)
+#define MACHREGS_powerpc  1
+#endif
+
+#ifdef sparc_HOST_ARCH
+#define MACHREGS_sparc    1
+#endif
+
+#ifdef arm_HOST_ARCH
+#define MACHREGS_arm      1
+#endif
+
+#ifdef aarch64_HOST_ARCH
+#define MACHREGS_aarch64  1
+#endif
+
+#ifdef darwin_HOST_OS
+#define MACHREGS_darwin   1
+#endif
 
 #endif
 
diff --git a/includes/stg/SMP.h b/includes/stg/SMP.h
index e4ae6121fa..4020aef0d9 100644
--- a/includes/stg/SMP.h
+++ b/includes/stg/SMP.h
@@ -13,7 +13,7 @@
 
 #pragma once
 
-#if arm_HOST_ARCH && defined(arm_HOST_ARCH_PRE_ARMv6)
+#if defined(arm_HOST_ARCH) && defined(arm_HOST_ARCH_PRE_ARMv6)
 void arm_atomic_spin_lock(void);
 void arm_atomic_spin_unlock(void);
 #endif
@@ -186,14 +186,15 @@ EXTERN_INLINE void
 write_barrier(void) {
 #if defined(NOSMP)
     return;
-#elif i386_HOST_ARCH || x86_64_HOST_ARCH
+#elif defined(i386_HOST_ARCH) || defined(x86_64_HOST_ARCH)
     __asm__ __volatile__ ("" : : : "memory");
-#elif powerpc_HOST_ARCH || powerpc64_HOST_ARCH || powerpc64le_HOST_ARCH
+#elif defined(powerpc_HOST_ARCH) || defined(powerpc64_HOST_ARCH) \
+    || defined(powerpc64le_HOST_ARCH)
     __asm__ __volatile__ ("lwsync" : : : "memory");
-#elif sparc_HOST_ARCH
+#elif defined(sparc_HOST_ARCH)
     /* Sparc in TSO mode does not require store/store barriers. */
     __asm__ __volatile__ ("" : : : "memory");
-#elif (arm_HOST_ARCH) || aarch64_HOST_ARCH
+#elif defined(arm_HOST_ARCH) || defined(aarch64_HOST_ARCH)
     __asm__ __volatile__ ("dmb  st" : : : "memory");
 #else
 #error memory barriers unimplemented on this architecture
@@ -204,17 +205,18 @@ EXTERN_INLINE void
 store_load_barrier(void) {
 #if defined(NOSMP)
     return;
-#elif i386_HOST_ARCH
+#elif defined(i386_HOST_ARCH)
     __asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory");
-#elif x86_64_HOST_ARCH
+#elif defined(x86_64_HOST_ARCH)
     __asm__ __volatile__ ("lock; addq $0,0(%%rsp)" : : : "memory");
-#elif powerpc_HOST_ARCH || powerpc64_HOST_ARCH || powerpc64le_HOST_ARCH
+#elif defined(powerpc_HOST_ARCH) || defined(powerpc64_HOST_ARCH) \
+    || defined(powerpc64le_HOST_ARCH)
     __asm__ __volatile__ ("sync" : : : "memory");
-#elif sparc_HOST_ARCH
+#elif defined(sparc_HOST_ARCH)
     __asm__ __volatile__ ("membar #StoreLoad" : : : "memory");
-#elif arm_HOST_ARCH
+#elif defined(arm_HOST_ARCH)
     __asm__ __volatile__ ("dmb" : : : "memory");
-#elif aarch64_HOST_ARCH
+#elif defined(aarch64_HOST_ARCH)
     __asm__ __volatile__ ("dmb sy" : : : "memory");
 #else
 #error memory barriers unimplemented on this architecture
@@ -225,18 +227,19 @@ EXTERN_INLINE void
 load_load_barrier(void) {
 #if defined(NOSMP)
     return;
-#elif i386_HOST_ARCH
+#elif defined(i386_HOST_ARCH)
     __asm__ __volatile__ ("" : : : "memory");
-#elif x86_64_HOST_ARCH
+#elif defined(x86_64_HOST_ARCH)
     __asm__ __volatile__ ("" : : : "memory");
-#elif powerpc_HOST_ARCH || powerpc64_HOST_ARCH || powerpc64le_HOST_ARCH
+#elif defined(powerpc_HOST_ARCH) || defined(powerpc64_HOST_ARCH) \
+    || defined(powerpc64le_HOST_ARCH)
     __asm__ __volatile__ ("lwsync" : : : "memory");
-#elif sparc_HOST_ARCH
+#elif defined(sparc_HOST_ARCH)
     /* Sparc in TSO mode does not require load/load barriers. */
     __asm__ __volatile__ ("" : : : "memory");
-#elif arm_HOST_ARCH
+#elif defined(arm_HOST_ARCH)
     __asm__ __volatile__ ("dmb" : : : "memory");
-#elif aarch64_HOST_ARCH
+#elif defined(aarch64_HOST_ARCH)
     __asm__ __volatile__ ("dmb sy" : : : "memory");
 #else
 #error memory barriers unimplemented on this architecture