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| author | Karel Gardas <karel.gardas@centrum.cz> | 2011-07-03 23:24:14 +0200 |
|---|---|---|
| committer | Manuel M T Chakravarty <chak@cse.unsw.edu.au> | 2011-08-10 22:03:41 +1000 |
| commit | e44642590550547675bffd37d395008eb978f119 (patch) | |
| tree | edd3171ac470abf15cc2ad19df5876134f99c32f /rts/OldARMAtomic.c | |
| parent | f0191c559d683b5bac12243c0db3b780b684799e (diff) | |
| download | haskell-e44642590550547675bffd37d395008eb978f119.tar.gz | |
Stephen Blackheath's GHC/ARM registerised port
This is the Stephen Blackheath's GHC/ARM registerised port
which is using modified version of LLVM and which provides
basic registerised build functionality
Diffstat (limited to 'rts/OldARMAtomic.c')
| -rw-r--r-- | rts/OldARMAtomic.c | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/rts/OldARMAtomic.c b/rts/OldARMAtomic.c new file mode 100644 index 0000000000..2a3c6c6655 --- /dev/null +++ b/rts/OldARMAtomic.c @@ -0,0 +1,47 @@ +#include "PosixSource.h" +#include "Stg.h" + +#if defined(HAVE_SCHED_H) +#include <sched.h> +#endif + +#if defined(THREADED_RTS) + +#if arm_HOST_ARCH && defined(PRE_ARMv6) + +static volatile int atomic_spin = 0; + +static int arm_atomic_spin_trylock (void) +{ + int result; + + asm volatile ( + "swp %0, %1, [%2]\n" + : "=&r,&r" (result) + : "r,0" (1), "r,r" (&atomic_spin) + : "memory"); + if (result == 0) + return 0; + else + return -1; +} + +void arm_atomic_spin_lock() +{ + while (arm_atomic_spin_trylock()) +#if defined(HAVE_SCHED_H) + sched_yield(); +#else + ; // inefficient on non-POSIX. +#endif +} + +void arm_atomic_spin_unlock() +{ + atomic_spin = 0; +} + +#endif /* arm_HOST_ARCH && defined(PRE_ARMv6) */ + +#endif /* defined(THREADED_RTS) */ + |