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authorBen Gamari <ben@smart-cactus.org>2020-08-21 11:55:43 -0400
committerMarge Bot <ben+marge-bot@smart-cactus.org>2020-09-18 15:55:50 -0400
commit0799b3de3e3462224bddc0e4b6a3156d04a06361 (patch)
tree59d7661229f7c841f4f6298db7b35ae085a129d0 /rts/STM.c
parentb689f3db0229ac58af5383796fb13c6d40e358ce (diff)
downloadhaskell-0799b3de3e3462224bddc0e4b6a3156d04a06361.tar.gz
rts/nonmoving: Add missing STM write barrier
When updating a TRec for a TVar already part of a transaction we previously neglected to add the old value to the update remembered set. I suspect this was the cause of #18587.
Diffstat (limited to 'rts/STM.c')
-rw-r--r--rts/STM.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/rts/STM.c b/rts/STM.c
index 5f72c0ebfb..cff0d55082 100644
--- a/rts/STM.c
+++ b/rts/STM.c
@@ -1342,6 +1342,9 @@ void stmWriteTVar(Capability *cap,
if (entry != NULL) {
if (entry_in == trec) {
// Entry found in our trec
+ IF_NONMOVING_WRITE_BARRIER_ENABLED {
+ updateRemembSetPushClosure(cap, (StgClosure *) entry->new_value);
+ }
entry -> new_value = new_value;
} else {
// Entry found in another trec