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| author | Karel Gardas <karel.gardas@centrum.cz> | 2011-07-09 17:54:30 +0200 |
|---|---|---|
| committer | Manuel M T Chakravarty <chak@cse.unsw.edu.au> | 2011-08-10 22:03:41 +1000 |
| commit | a9b455c4b6960d47d31e769052104a4a4fc26cf0 (patch) | |
| tree | 6783ad7c5ae85b0ea18a31759e1ead87914733ac /rts/WSDeque.c | |
| parent | b0538fd43a8d813dff50dbdde493d099b753e0e8 (diff) | |
| download | haskell-a9b455c4b6960d47d31e769052104a4a4fc26cf0.tar.gz | |
RTS: fix xchg/cas fcns to invoke memory barrier on ARMv7 platform
This patch fixes RTS' xchg and cas functions. On ARMv7 it is recommended
to add memory barrier after using ldrex/strex for implementing atomic
lock or operation.
Diffstat (limited to 'rts/WSDeque.c')
0 files changed, 0 insertions, 0 deletions