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| author | Andreas Schwab <schwab@suse.de> | 2020-10-02 23:49:01 +0200 |
|---|---|---|
| committer | Marge Bot <ben+marge-bot@smart-cactus.org> | 2021-03-05 14:01:56 -0500 |
| commit | 31e265c1df948d1bcc82d08affe995fd1d1c1438 (patch) | |
| tree | 4a7cc73979d7276946b7435307359d5a4481d574 /rts/rts.cabal.in | |
| parent | 6141aef49b37297e94c9e33a977438c2de15d086 (diff) | |
| download | haskell-31e265c1df948d1bcc82d08affe995fd1d1c1438.tar.gz | |
Implement riscv64 LLVM backend
This enables a registerised build for the riscv64 architecture.
Diffstat (limited to 'rts/rts.cabal.in')
| -rw-r--r-- | rts/rts.cabal.in | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/rts/rts.cabal.in b/rts/rts.cabal.in index 427c78c40f..3b42544116 100644 --- a/rts/rts.cabal.in +++ b/rts/rts.cabal.in @@ -417,7 +417,7 @@ library if arch(i386) || arch(ppc) || arch(ppc64) asm-sources: AdjustorAsm.S - if arch(ppc) || arch(ppc64) || arch(s390x) + if arch(ppc) || arch(ppc64) || arch(s390x) || arch(riscv64) asm-sources: StgCRunAsm.S c-sources: Adjustor.c |