diff options
| author | Shea Levy <shea@shealevy.com> | 2016-11-15 22:01:56 -0500 |
|---|---|---|
| committer | Ben Gamari <ben@smart-cactus.org> | 2016-11-15 22:02:18 -0500 |
| commit | 0135188fecfc679a498093f8fc5f665d706fa4cb (patch) | |
| tree | c6881e7c2c3bcd887f1cd083d7927803135f4881 /rts/sm/Storage.c | |
| parent | a637eeb7a1852adfd99b06d2c0a3496e4f238a0c (diff) | |
| download | haskell-0135188fecfc679a498093f8fc5f665d706fa4cb.tar.gz | |
Storage.c: Pass a size to sys_icache_invalidate
The previous code passed an end pointer, but the interface takes a size
instead.
Fixes #12838.
Reviewers: austin, erikd, simonmar, bgamari
Reviewed By: simonmar, bgamari
Subscribers: thomie
Differential Revision: https://phabricator.haskell.org/D2711
GHC Trac Issues: #12838
Diffstat (limited to 'rts/sm/Storage.c')
| -rw-r--r-- | rts/sm/Storage.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/rts/sm/Storage.c b/rts/sm/Storage.c index 357e0180d2..da1acbcf5b 100644 --- a/rts/sm/Storage.c +++ b/rts/sm/Storage.c @@ -1314,7 +1314,7 @@ calcNeeded (rtsBool force_major, memcount *blocks_needed) ------------------------------------------------------------------------- */ #if (defined(arm_HOST_ARCH) || defined(aarch64_HOST_ARCH)) && defined(ios_HOST_OS) -void sys_icache_invalidate(void *start, size_t len); +#include <libkern/OSCacheControl.h> #endif /* On ARM and other platforms, we need to flush the cache after @@ -1327,7 +1327,7 @@ void flushExec (W_ len, AdjustorExecutable exec_addr) (void)exec_addr; #elif (defined(arm_HOST_ARCH) || defined(aarch64_HOST_ARCH)) && defined(ios_HOST_OS) /* On iOS we need to use the special 'sys_icache_invalidate' call. */ - sys_icache_invalidate(exec_addr, ((unsigned char*)exec_addr)+len); + sys_icache_invalidate(exec_addr, len); #elif defined(__GNUC__) /* For all other platforms, fall back to a libgcc builtin. */ unsigned char* begin = (unsigned char*)exec_addr; |