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authorBen Gamari <ben@smart-cactus.org>2020-10-29 22:55:15 -0400
committerBen Gamari <ben@smart-cactus.org>2020-10-30 14:02:19 -0400
commitf7b45cde43f47f94b77411477aabdb56f8f63d66 (patch)
treed07d2662001281e4d640de60c4f7f2f35cd3638d /rts
parent105d43db7bb7f399be3e5474d207e330d1b2da5a (diff)
downloadhaskell-f7b45cde43f47f94b77411477aabdb56f8f63d66.tar.gz
rts: Use relaxed ordering on spinlock counterswip/tsan/storage
Diffstat (limited to 'rts')
-rw-r--r--rts/SpinLock.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/rts/SpinLock.c b/rts/SpinLock.c
index 314918257f..5289694aa7 100644
--- a/rts/SpinLock.c
+++ b/rts/SpinLock.c
@@ -30,10 +30,10 @@ void acquire_spin_lock_slow_path(SpinLock * p)
for (uint32_t i = 0; i < SPIN_COUNT; i++) {
StgWord32 r = cas((StgVolatilePtr)&(p->lock), 1, 0);
if (r != 0) return;
- IF_PROF_SPIN(__atomic_fetch_add(&p->spin, 1, __ATOMIC_RELAXED));
+ IF_PROF_SPIN(RELAXED_ADD(&p->spin, 1));
busy_wait_nop();
}
- IF_PROF_SPIN(__atomic_fetch_add(&p->yield, 1, __ATOMIC_RELAXED));
+ IF_PROF_SPIN(RELAXED_ADD(&p->yield, 1));
yieldThread();
} while (1);
}