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author | Moritz Angermann <moritz.angermann@gmail.com> | 2017-09-25 14:17:11 +0800 |
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committer | Moritz Angermann <moritz.angermann@gmail.com> | 2017-09-27 16:32:40 +0800 |
commit | 60b06456ddef08bd8a8a47497a6cbefbb5e359fb (patch) | |
tree | 78d1875d22fab3c0ca93c08d2f800f3e27c8f32c /utils | |
parent | 07ddeaf7ea0d12c3e1f1be54ed19fdb3d9bf96b7 (diff) | |
download | haskell-60b06456ddef08bd8a8a47497a6cbefbb5e359fb.tar.gz |
llvm-targets: drop soft-float
Summary:
The llvm-targets file records `mattr` values, and
while interrogating `clang` for the target, we might
stumble upon `+soft-float-abi`, however ghc does not support
full soft-float, and as such passing `+soft-float` to `llc`
will result in segfaults for any function passing float
registers F1, ... in the ARM Instruction Selection Pass.
Reviewers: bgamari, austin
Reviewed By: bgamari
Subscribers: rwbarton, thomie
Differential Revision: https://phabricator.haskell.org/D4030
Diffstat (limited to 'utils')
-rwxr-xr-x | utils/llvm-targets/gen-data-layout.sh | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/utils/llvm-targets/gen-data-layout.sh b/utils/llvm-targets/gen-data-layout.sh index 79068e9127..95c629c241 100755 --- a/utils/llvm-targets/gen-data-layout.sh +++ b/utils/llvm-targets/gen-data-layout.sh @@ -36,7 +36,20 @@ function get_cpu_and_attr() { while [ "$#" -gt 0 ]; do case "$1" in -target-cpu) CPU=$2; shift 2;; - -target-feature) ATTR+=("$2"); shift 2;; + -target-feature) + # translate clang to opt/llc target features + case "$2" in + # we don't have support in GHC for proper soft-float. + # if we extend the `llvm-target` file to contain two + # additional columns for opt and llc flags, we could + # pass -float-abi=soft; However ghc will use float + # registers unconditionally on arm, and as such true + # soft float with the registered llvm backed will is + # currently not possible. + +soft-float-abi) shift 2;; + *) ATTR+=("$2"); shift 2;; + esac + ;; *) shift 1;; esac done |