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-rw-r--r--aclocal.m411
-rw-r--r--compiler/cmm/PprC.hs3
-rw-r--r--compiler/nativeGen/AsmCodeGen.lhs6
-rw-r--r--compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs12
-rw-r--r--compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs3
-rw-r--r--compiler/nativeGen/RegAlloc/Linear/Main.hs3
-rw-r--r--compiler/nativeGen/TargetReg.hs15
-rw-r--r--compiler/utils/Platform.hs3
8 files changed, 55 insertions, 1 deletions
diff --git a/aclocal.m4 b/aclocal.m4
index 722abcd775..6ccddda35c 100644
--- a/aclocal.m4
+++ b/aclocal.m4
@@ -173,7 +173,16 @@ AC_DEFUN([FPTOOLS_SET_HASKELL_PLATFORM_VARS],
GET_ARM_ISA()
test -z "[$]2" || eval "[$]2=\"ArchARM {armISA = \$ARM_ISA, armISAExt = \$ARM_ISA_EXT, armABI = \$ARM_ABI}\""
;;
- alpha|mips|mipseb|mipsel|hppa|hppa1_1|ia64|m68k|rs6000|s390|s390x|sparc64|vax)
+ alpha)
+ test -z "[$]2" || eval "[$]2=ArchAlpha"
+ ;;
+ mips|mipseb)
+ test -z "[$]2" || eval "[$]2=ArchMipseb"
+ ;;
+ mipsel)
+ test -z "[$]2" || eval "[$]2=ArchMipsel"
+ ;;
+ hppa|hppa1_1|ia64|m68k|rs6000|s390|s390x|sparc64|vax)
test -z "[$]2" || eval "[$]2=ArchUnknown"
;;
*)
diff --git a/compiler/cmm/PprC.hs b/compiler/cmm/PprC.hs
index 9ebb12d752..1fe3872091 100644
--- a/compiler/cmm/PprC.hs
+++ b/compiler/cmm/PprC.hs
@@ -995,6 +995,9 @@ cLoad expr rep
in parens (cast <+> pprExpr1 expr) <> ptext (sLit "->x")
else char '*' <> parens (cCast (machRepPtrCType rep) expr)
where -- On these platforms, unaligned loads are known to cause problems
+ bewareLoadStoreAlignment ArchAlpha = True
+ bewareLoadStoreAlignment ArchMipseb = True
+ bewareLoadStoreAlignment ArchMipsel = True
bewareLoadStoreAlignment (ArchARM {}) = True
bewareLoadStoreAlignment _ = False
diff --git a/compiler/nativeGen/AsmCodeGen.lhs b/compiler/nativeGen/AsmCodeGen.lhs
index 53d1949aeb..863af126f3 100644
--- a/compiler/nativeGen/AsmCodeGen.lhs
+++ b/compiler/nativeGen/AsmCodeGen.lhs
@@ -210,6 +210,12 @@ nativeCodeGen dflags h us cmms
panic "nativeCodeGen: No NCG for ARM"
ArchPPC_64 ->
panic "nativeCodeGen: No NCG for PPC 64"
+ ArchAlpha ->
+ panic "nativeCodeGen: No NCG for Alpha"
+ ArchMipseb ->
+ panic "nativeCodeGen: No NCG for mipseb"
+ ArchMipsel ->
+ panic "nativeCodeGen: No NCG for mipsel"
ArchUnknown ->
panic "nativeCodeGen: No NCG for unknown arch"
diff --git a/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs b/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs
index 6cd3f00024..378e1755e6 100644
--- a/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs
+++ b/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs
@@ -113,6 +113,9 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcInteger conflicts excl
ArchSPARC -> 14
ArchPPC_64 -> panic "trivColorable ArchPPC_64"
ArchARM _ _ _ -> panic "trivColorable ArchARM"
+ ArchAlpha -> panic "trivColorable ArchAlpha"
+ ArchMipseb -> panic "trivColorable ArchMipseb"
+ ArchMipsel -> panic "trivColorable ArchMipsel"
ArchUnknown -> panic "trivColorable ArchUnknown")
, count2 <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_INTEGER
(virtualRegSqueeze RcInteger)
@@ -133,6 +136,9 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcFloat conflicts exclus
ArchSPARC -> 22
ArchPPC_64 -> panic "trivColorable ArchPPC_64"
ArchARM _ _ _ -> panic "trivColorable ArchARM"
+ ArchAlpha -> panic "trivColorable ArchAlpha"
+ ArchMipseb -> panic "trivColorable ArchMipseb"
+ ArchMipsel -> panic "trivColorable ArchMipsel"
ArchUnknown -> panic "trivColorable ArchUnknown")
, count2 <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_FLOAT
(virtualRegSqueeze RcFloat)
@@ -153,6 +159,9 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcDouble conflicts exclu
ArchSPARC -> 11
ArchPPC_64 -> panic "trivColorable ArchPPC_64"
ArchARM _ _ _ -> panic "trivColorable ArchARM"
+ ArchAlpha -> panic "trivColorable ArchAlpha"
+ ArchMipseb -> panic "trivColorable ArchMipseb"
+ ArchMipsel -> panic "trivColorable ArchMipsel"
ArchUnknown -> panic "trivColorable ArchUnknown")
, count2 <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_DOUBLE
(virtualRegSqueeze RcDouble)
@@ -173,6 +182,9 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcDoubleSSE conflicts ex
ArchSPARC -> 0
ArchPPC_64 -> panic "trivColorable ArchPPC_64"
ArchARM _ _ _ -> panic "trivColorable ArchARM"
+ ArchAlpha -> panic "trivColorable ArchAlpha"
+ ArchMipseb -> panic "trivColorable ArchMipseb"
+ ArchMipsel -> panic "trivColorable ArchMipsel"
ArchUnknown -> panic "trivColorable ArchUnknown")
, count2 <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_SSE
(virtualRegSqueeze RcDoubleSSE)
diff --git a/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs b/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs
index fffdef761b..f64c30e5b2 100644
--- a/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs
@@ -82,5 +82,8 @@ maxSpillSlots dflags
ArchSPARC -> SPARC.Instr.maxSpillSlots dflags
ArchARM _ _ _ -> panic "maxSpillSlots ArchARM"
ArchPPC_64 -> panic "maxSpillSlots ArchPPC_64"
+ ArchAlpha -> panic "maxSpillSlots ArchAlpha"
+ ArchMipseb -> panic "maxSpillSlots ArchMipseb"
+ ArchMipsel -> panic "maxSpillSlots ArchMipsel"
ArchUnknown -> panic "maxSpillSlots ArchUnknown"
diff --git a/compiler/nativeGen/RegAlloc/Linear/Main.hs b/compiler/nativeGen/RegAlloc/Linear/Main.hs
index fa71457808..6348b41690 100644
--- a/compiler/nativeGen/RegAlloc/Linear/Main.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/Main.hs
@@ -208,6 +208,9 @@ linearRegAlloc dflags first_id block_live sccs
ArchPPC -> linearRegAlloc' dflags (frInitFreeRegs platform :: PPC.FreeRegs) first_id block_live sccs
ArchARM _ _ _ -> panic "linearRegAlloc ArchARM"
ArchPPC_64 -> panic "linearRegAlloc ArchPPC_64"
+ ArchAlpha -> panic "linearRegAlloc ArchAlpha"
+ ArchMipseb -> panic "linearRegAlloc ArchMipseb"
+ ArchMipsel -> panic "linearRegAlloc ArchMipsel"
ArchUnknown -> panic "linearRegAlloc ArchUnknown"
linearRegAlloc'
diff --git a/compiler/nativeGen/TargetReg.hs b/compiler/nativeGen/TargetReg.hs
index 71e02a4c15..f380534c88 100644
--- a/compiler/nativeGen/TargetReg.hs
+++ b/compiler/nativeGen/TargetReg.hs
@@ -54,6 +54,9 @@ targetVirtualRegSqueeze platform
ArchSPARC -> SPARC.virtualRegSqueeze
ArchPPC_64 -> panic "targetVirtualRegSqueeze ArchPPC_64"
ArchARM _ _ _ -> panic "targetVirtualRegSqueeze ArchARM"
+ ArchAlpha -> panic "targetVirtualRegSqueeze ArchAlpha"
+ ArchMipseb -> panic "targetVirtualRegSqueeze ArchMipseb"
+ ArchMipsel -> panic "targetVirtualRegSqueeze ArchMipsel"
ArchUnknown -> panic "targetVirtualRegSqueeze ArchUnknown"
targetRealRegSqueeze :: Platform -> RegClass -> RealReg -> FastInt
@@ -65,6 +68,9 @@ targetRealRegSqueeze platform
ArchSPARC -> SPARC.realRegSqueeze
ArchPPC_64 -> panic "targetRealRegSqueeze ArchPPC_64"
ArchARM _ _ _ -> panic "targetRealRegSqueeze ArchARM"
+ ArchAlpha -> panic "targetRealRegSqueeze ArchAlpha"
+ ArchMipseb -> panic "targetRealRegSqueeze ArchMipseb"
+ ArchMipsel -> panic "targetRealRegSqueeze ArchMipsel"
ArchUnknown -> panic "targetRealRegSqueeze ArchUnknown"
targetClassOfRealReg :: Platform -> RealReg -> RegClass
@@ -76,6 +82,9 @@ targetClassOfRealReg platform
ArchSPARC -> SPARC.classOfRealReg
ArchPPC_64 -> panic "targetClassOfRealReg ArchPPC_64"
ArchARM _ _ _ -> panic "targetClassOfRealReg ArchARM"
+ ArchAlpha -> panic "targetClassOfRealReg ArchAlpha"
+ ArchMipseb -> panic "targetClassOfRealReg ArchMipseb"
+ ArchMipsel -> panic "targetClassOfRealReg ArchMipsel"
ArchUnknown -> panic "targetClassOfRealReg ArchUnknown"
targetMkVirtualReg :: Platform -> Unique -> Size -> VirtualReg
@@ -87,6 +96,9 @@ targetMkVirtualReg platform
ArchSPARC -> SPARC.mkVirtualReg
ArchPPC_64 -> panic "targetMkVirtualReg ArchPPC_64"
ArchARM _ _ _ -> panic "targetMkVirtualReg ArchARM"
+ ArchAlpha -> panic "targetMkVirtualReg ArchAlpha"
+ ArchMipseb -> panic "targetMkVirtualReg ArchMipseb"
+ ArchMipsel -> panic "targetMkVirtualReg ArchMipsel"
ArchUnknown -> panic "targetMkVirtualReg ArchUnknown"
targetRegDotColor :: Platform -> RealReg -> SDoc
@@ -98,6 +110,9 @@ targetRegDotColor platform
ArchSPARC -> SPARC.regDotColor
ArchPPC_64 -> panic "targetRegDotColor ArchPPC_64"
ArchARM _ _ _ -> panic "targetRegDotColor ArchARM"
+ ArchAlpha -> panic "targetRegDotColor ArchAlpha"
+ ArchMipseb -> panic "targetRegDotColor ArchMipseb"
+ ArchMipsel -> panic "targetRegDotColor ArchMipsel"
ArchUnknown -> panic "targetRegDotColor ArchUnknown"
diff --git a/compiler/utils/Platform.hs b/compiler/utils/Platform.hs
index a562b4f6f9..76c9fa3c3c 100644
--- a/compiler/utils/Platform.hs
+++ b/compiler/utils/Platform.hs
@@ -48,6 +48,9 @@ data Arch
, armISAExt :: [ArmISAExt]
, armABI :: ArmABI
}
+ | ArchAlpha
+ | ArchMipseb
+ | ArchMipsel
deriving (Read, Show, Eq)
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