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-rw-r--r--compiler/GHC/CmmToAsm/Reg/Graph/TrivColorable.hs2
-rw-r--r--compiler/GHC/CmmToAsm/SPARC/Regs.hs2
-rw-r--r--compiler/GHC/CmmToAsm/X86/Ppr.hs2
3 files changed, 3 insertions, 3 deletions
diff --git a/compiler/GHC/CmmToAsm/Reg/Graph/TrivColorable.hs b/compiler/GHC/CmmToAsm/Reg/Graph/TrivColorable.hs
index 83f581cac4..cd4208bc89 100644
--- a/compiler/GHC/CmmToAsm/Reg/Graph/TrivColorable.hs
+++ b/compiler/GHC/CmmToAsm/Reg/Graph/TrivColorable.hs
@@ -40,7 +40,7 @@ import GHC.Utils.Panic
-- TODO: Is that still true? Could we use allocatableRegsInClass
-- without losing performance now?
--
--- Look at includes/stg/MachRegs.h to get the numbers.
+-- Look at rts/include/stg/MachRegs.h to get the numbers.
--
diff --git a/compiler/GHC/CmmToAsm/SPARC/Regs.hs b/compiler/GHC/CmmToAsm/SPARC/Regs.hs
index 949701cf2d..0325814c6b 100644
--- a/compiler/GHC/CmmToAsm/SPARC/Regs.hs
+++ b/compiler/GHC/CmmToAsm/SPARC/Regs.hs
@@ -50,7 +50,7 @@ import GHC.Utils.Panic
prepared for any eventuality.
The whole fp-register pairing thing on sparcs is a huge nuisance. See
- includes/stg/MachRegs.h for a description of what's going on
+ rts/include/stg/MachRegs.h for a description of what's going on
here.
-}
diff --git a/compiler/GHC/CmmToAsm/X86/Ppr.hs b/compiler/GHC/CmmToAsm/X86/Ppr.hs
index 5f030b8d58..e284e618da 100644
--- a/compiler/GHC/CmmToAsm/X86/Ppr.hs
+++ b/compiler/GHC/CmmToAsm/X86/Ppr.hs
@@ -555,7 +555,7 @@ pprDataItem config lit
-- to 32-bit offset fields and modify the RTS
-- appropriately
--
- -- See Note [x86-64-relative] in includes/rts/storage/InfoTables.h
+ -- See Note [x86-64-relative] in rts/include/rts/storage/InfoTables.h
--
case lit of
-- A relative relocation: