diff options
Diffstat (limited to 'compiler')
-rw-r--r-- | compiler/nativeGen/AsmCodeGen.lhs | 2 | ||||
-rw-r--r-- | compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs | 8 | ||||
-rw-r--r-- | compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs | 2 | ||||
-rw-r--r-- | compiler/nativeGen/RegAlloc/Linear/Main.hs | 2 | ||||
-rw-r--r-- | compiler/nativeGen/TargetReg.hs | 10 | ||||
-rw-r--r-- | compiler/nativeGen/X86/RegInfo.hs | 2 | ||||
-rw-r--r-- | compiler/utils/Platform.hs | 43 |
7 files changed, 54 insertions, 15 deletions
diff --git a/compiler/nativeGen/AsmCodeGen.lhs b/compiler/nativeGen/AsmCodeGen.lhs index 94b0258f57..350f533d85 100644 --- a/compiler/nativeGen/AsmCodeGen.lhs +++ b/compiler/nativeGen/AsmCodeGen.lhs @@ -199,7 +199,7 @@ nativeCodeGen dflags h us cmms ,ncgExpandTop = map SPARC.CodeGen.Expand.expandTop ,ncgMakeFarBranches = id } - ArchARM -> + ArchARM _ _ -> panic "nativeCodeGen: No NCG for ARM" ArchPPC_64 -> panic "nativeCodeGen: No NCG for PPC 64" diff --git a/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs b/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs index e62b4a9abb..6067f23ade 100644 --- a/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs +++ b/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs @@ -112,7 +112,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcInteger conflicts excl ArchPPC -> 16 ArchSPARC -> 14 ArchPPC_64 -> panic "trivColorable ArchPPC_64" - ArchARM -> panic "trivColorable ArchARM" + ArchARM _ _ -> panic "trivColorable ArchARM" ArchUnknown -> panic "trivColorable ArchUnknown") , count2 <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_INTEGER (virtualRegSqueeze RcInteger) @@ -132,7 +132,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcFloat conflicts exclus ArchPPC -> 0 ArchSPARC -> 22 ArchPPC_64 -> panic "trivColorable ArchPPC_64" - ArchARM -> panic "trivColorable ArchARM" + ArchARM _ _ -> panic "trivColorable ArchARM" ArchUnknown -> panic "trivColorable ArchUnknown") , count2 <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_FLOAT (virtualRegSqueeze RcFloat) @@ -152,7 +152,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcDouble conflicts exclu ArchPPC -> 26 ArchSPARC -> 11 ArchPPC_64 -> panic "trivColorable ArchPPC_64" - ArchARM -> panic "trivColorable ArchARM" + ArchARM _ _ -> panic "trivColorable ArchARM" ArchUnknown -> panic "trivColorable ArchUnknown") , count2 <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_DOUBLE (virtualRegSqueeze RcDouble) @@ -172,7 +172,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcDoubleSSE conflicts ex ArchPPC -> 0 ArchSPARC -> 0 ArchPPC_64 -> panic "trivColorable ArchPPC_64" - ArchARM -> panic "trivColorable ArchARM" + ArchARM _ _ -> panic "trivColorable ArchARM" ArchUnknown -> panic "trivColorable ArchUnknown") , count2 <- accSqueeze (_ILIT(0)) cALLOCATABLE_REGS_SSE (virtualRegSqueeze RcDoubleSSE) diff --git a/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs b/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs index 5a413d341e..809e185d9b 100644 --- a/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs +++ b/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs @@ -65,7 +65,7 @@ maxSpillSlots platform ArchX86_64 -> X86.Instr.maxSpillSlots ArchPPC -> PPC.Instr.maxSpillSlots ArchSPARC -> SPARC.Instr.maxSpillSlots - ArchARM -> panic "maxSpillSlots ArchARM" + ArchARM _ _ -> panic "maxSpillSlots ArchARM" ArchPPC_64 -> panic "maxSpillSlots ArchPPC_64" ArchUnknown -> panic "maxSpillSlots ArchUnknown" diff --git a/compiler/nativeGen/RegAlloc/Linear/Main.hs b/compiler/nativeGen/RegAlloc/Linear/Main.hs index 8fa758d063..f1af6a5e39 100644 --- a/compiler/nativeGen/RegAlloc/Linear/Main.hs +++ b/compiler/nativeGen/RegAlloc/Linear/Main.hs @@ -184,7 +184,7 @@ linearRegAlloc dflags first_id block_live sccs ArchX86_64 -> linearRegAlloc' platform (frInitFreeRegs :: X86.FreeRegs) first_id block_live sccs ArchSPARC -> linearRegAlloc' platform (frInitFreeRegs :: SPARC.FreeRegs) first_id block_live sccs ArchPPC -> linearRegAlloc' platform (frInitFreeRegs :: PPC.FreeRegs) first_id block_live sccs - ArchARM -> panic "linearRegAlloc ArchARM" + ArchARM _ _ -> panic "linearRegAlloc ArchARM" ArchPPC_64 -> panic "linearRegAlloc ArchPPC_64" ArchUnknown -> panic "linearRegAlloc ArchUnknown" diff --git a/compiler/nativeGen/TargetReg.hs b/compiler/nativeGen/TargetReg.hs index 089269785c..c633182116 100644 --- a/compiler/nativeGen/TargetReg.hs +++ b/compiler/nativeGen/TargetReg.hs @@ -48,7 +48,7 @@ targetVirtualRegSqueeze platform ArchPPC -> PPC.virtualRegSqueeze ArchSPARC -> SPARC.virtualRegSqueeze ArchPPC_64 -> panic "targetVirtualRegSqueeze ArchPPC_64" - ArchARM -> panic "targetVirtualRegSqueeze ArchARM" + ArchARM _ _ -> panic "targetVirtualRegSqueeze ArchARM" ArchUnknown -> panic "targetVirtualRegSqueeze ArchUnknown" targetRealRegSqueeze :: Platform -> RegClass -> RealReg -> FastInt @@ -59,7 +59,7 @@ targetRealRegSqueeze platform ArchPPC -> PPC.realRegSqueeze ArchSPARC -> SPARC.realRegSqueeze ArchPPC_64 -> panic "targetRealRegSqueeze ArchPPC_64" - ArchARM -> panic "targetRealRegSqueeze ArchARM" + ArchARM _ _ -> panic "targetRealRegSqueeze ArchARM" ArchUnknown -> panic "targetRealRegSqueeze ArchUnknown" targetClassOfRealReg :: Platform -> RealReg -> RegClass @@ -70,7 +70,7 @@ targetClassOfRealReg platform ArchPPC -> PPC.classOfRealReg ArchSPARC -> SPARC.classOfRealReg ArchPPC_64 -> panic "targetClassOfRealReg ArchPPC_64" - ArchARM -> panic "targetClassOfRealReg ArchARM" + ArchARM _ _ -> panic "targetClassOfRealReg ArchARM" ArchUnknown -> panic "targetClassOfRealReg ArchUnknown" -- TODO: This should look at targetPlatform too @@ -85,7 +85,7 @@ targetMkVirtualReg platform ArchPPC -> PPC.mkVirtualReg ArchSPARC -> SPARC.mkVirtualReg ArchPPC_64 -> panic "targetMkVirtualReg ArchPPC_64" - ArchARM -> panic "targetMkVirtualReg ArchARM" + ArchARM _ _ -> panic "targetMkVirtualReg ArchARM" ArchUnknown -> panic "targetMkVirtualReg ArchUnknown" targetRegDotColor :: Platform -> RealReg -> SDoc @@ -96,7 +96,7 @@ targetRegDotColor platform ArchPPC -> PPC.regDotColor ArchSPARC -> SPARC.regDotColor ArchPPC_64 -> panic "targetRegDotColor ArchPPC_64" - ArchARM -> panic "targetRegDotColor ArchARM" + ArchARM _ _ -> panic "targetRegDotColor ArchARM" ArchUnknown -> panic "targetRegDotColor ArchUnknown" diff --git a/compiler/nativeGen/X86/RegInfo.hs b/compiler/nativeGen/X86/RegInfo.hs index c09ebc5b15..36b749ffda 100644 --- a/compiler/nativeGen/X86/RegInfo.hs +++ b/compiler/nativeGen/X86/RegInfo.hs @@ -58,7 +58,7 @@ normalRegColors platform ArchPPC -> panic "X86 normalRegColors ArchPPC" ArchPPC_64 -> panic "X86 normalRegColors ArchPPC_64" ArchSPARC -> panic "X86 normalRegColors ArchSPARC" - ArchARM -> panic "X86 normalRegColors ArchARM" + ArchARM _ _ -> panic "X86 normalRegColors ArchARM" ArchUnknown -> panic "X86 normalRegColors ArchUnknown" fpRegColors :: [(Reg,String)] diff --git a/compiler/utils/Platform.hs b/compiler/utils/Platform.hs index cff4a626e6..28532aa7f0 100644 --- a/compiler/utils/Platform.hs +++ b/compiler/utils/Platform.hs @@ -7,6 +7,8 @@ module Platform ( Platform(..), Arch(..), OS(..), + ArmISA(..), + ArmISAExt(..), defaultTargetPlatform, target32Bit, @@ -40,6 +42,8 @@ data Arch | ArchPPC_64 | ArchSPARC | ArchARM + { armISA :: ArmISA + , armISAExt :: [ArmISAExt] } deriving (Show, Eq) @@ -55,6 +59,22 @@ data OS | OSOpenBSD deriving (Show, Eq) +-- | ARM Instruction Set Architecture and Extensions +-- +data ArmISA + = ARMv5 + | ARMv6 + | ARMv7 + deriving (Show, Eq) + +data ArmISAExt + = VFPv2 + | VFPv3 + | VFPv3D16 + | NEON + | IWMMX2 + deriving (Show, Eq) + target32Bit :: Platform -> Bool target32Bit p = case platformArch p of @@ -64,7 +84,7 @@ target32Bit p = case platformArch p of ArchPPC -> True ArchPPC_64 -> False ArchSPARC -> True - ArchARM -> True + ArchARM _ _ -> True -- | This predicates tells us whether the OS supports ELF-like shared libraries. @@ -98,7 +118,7 @@ defaultTargetArch = ArchPPC_64 #elif sparc_TARGET_ARCH defaultTargetArch = ArchSPARC #elif arm_TARGET_ARCH -defaultTargetArch = ArchARM +defaultTargetArch = ArchARM defaultTargetArmISA defaultTargetArmISAExt #else defaultTargetArch = ArchUnknown #endif @@ -124,3 +144,22 @@ defaultTargetOS = OSOpenBSD defaultTargetOS = OSUnknown #endif +#if arm_TARGET_ARCH +defaultTargetArmISA :: ArmISA +#if defined(arm_HOST_ARCH_PRE_ARMv6) +defaultTargetArmISA = ARMv5 +#elif defined(arm_HOST_ARCH_PRE_ARMv7) +defaultTargetArmISA = ARMv6 +#else +defaultTargetArmISA = ARMv7 +#endif + +defaultTargetArmISAExt :: [ArmISAExt] +#if defined(arm_TARGET_ARCH) && !defined(arm_HOST_ARCH_PRE_ARMv7) +/* wild guess really, in case of ARMv7 we assume both VFPv3 and NEON presented + however this is not true for SoCs like NVidia Tegra2 and Marvell Dove */ +defaultTargetArmISAExt = [VFPv3, NEON] +#else +defaultTargetArmISAExt = [] +#endif +#endif /* arm_TARGET_ARCH */ |