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path: root/includes/stg/MachRegs.h
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* Prefer #if defined to #ifdefBen Gamari2017-04-281-9/+9
* Enable new warning for fragile/incorrect CPP #if usageErik de Castro Lopo2017-04-281-7/+7
* cpp: Use #pragma once instead of #ifndef guardsBen Gamari2017-04-231-4/+1
* Revert "Enable new warning for fragile/incorrect CPP #if usage"Ben Gamari2017-04-051-7/+7
* Enable new warning for fragile/incorrect CPP #if usageErik de Castro Lopo2017-04-051-7/+7
* Spelling fixes in comments [ci skip]Gabor Greif2017-01-181-2/+2
* PowerPC: Improve float register assignment.Peter Trommler2016-02-161-3/+9
* Comments only: more alternate names for ARM registers [skip ci]Reid Barton2016-01-251-3/+4
* cmm: Expose machine's stack and return address registerBen Gamari2015-11-011-0/+2
* Be aware of overlapping global STG registers in CmmSink (#10521)Reid Barton2015-06-251-0/+6
* arm64: 64bit iOS and SMP support (#7942)Luke Iannini2014-11-191-0/+2
* ghc: initial AArch64 patchesColin Watson2014-04-211-1/+56
* Globally replace "hackage.haskell.org" with "ghc.haskell.org"Simon Marlow2013-10-011-1/+1
* Pass 512-bit-wide vectors in registers.Geoffrey Mainland2013-09-221-0/+23
* Pass 256-bit-wide vectors in registers.Geoffrey Mainland2013-09-221-0/+23
* Enable passing vector arguments in xmm registers on x86-32.Geoffrey Mainland2013-09-221-1/+6
* Rename SSE -> XMM for consistency.Geoffrey Mainland2013-08-061-16/+16
* Add support for passing SSE vectors in registers.Geoffrey Mainland2013-02-011-12/+12
* \#undef REG_R[1-10] as a precautionSimon Marlow2013-01-301-0/+15
* Draw STG F and D registers from the same pool of available SSE registers on x...Geoffrey Mainland2012-10-301-6/+56
* Start separating out the RTS and Haskell imports of MachRegs.hIan Lynagh2012-08-061-41/+23
* Merge branch 'master' of win:c:/m64/reg4/.Ian Lynagh2012-03-231-0/+4
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| * Fix caller/callee register saving on Win64Ian Lynagh2012-03-231-0/+4
* | Code cleanDavid Terei2012-03-231-107/+98
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* Remove registerised code for dead architectures: mips, ia64, alpha,David Terei2011-11-221-294/+0
* Allow the use of R9 and R10 in primops; fixes trac #5423Ian Lynagh2011-11-061-1/+5
* ARMv5 compatibility for registerized runtime changes.Stephen Blackheath2011-08-101-0/+2
* add support for STG floating-point regs using VFPv3Karel Gardas2011-08-101-2/+44
* Stephen Blackheath's GHC/ARM registerised portKarel Gardas2011-08-101-0/+21
* Work around lack of saving volatile registers from unsafe foreign calls.Edward Z. Yang2011-05-151-0/+5
* Tidy up file headers and copyrights; point to the wiki for docsSimon Marlow2009-08-251-1/+6
* RTS tidyup sweep, first phaseSimon Marlow2009-08-021-0/+768