From fb0d5120d383324c6934144b938525378e3ade75 Mon Sep 17 00:00:00 2001 From: Peter Trommler Date: Wed, 11 Nov 2015 12:32:19 +0100 Subject: nativeGen.PPC: Fix shift arith. right > 31 bits Arithmetic right shifts of more than 31 bits set all bits to the sign bit on PowerPC. iThe assembler does not allow shift amounts larger than 32 so do an arithemetic right shift of 31 bit instead. Fixes #10870 Test Plan: validate (especially on powerpc) Reviewers: austin, erikd, bgamari Reviewed By: bgamari Subscribers: thomie Differential Revision: https://phabricator.haskell.org/D1459 GHC Trac Issues: #10870 --- compiler/nativeGen/PPC/Ppr.hs | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'compiler/nativeGen/PPC/Ppr.hs') diff --git a/compiler/nativeGen/PPC/Ppr.hs b/compiler/nativeGen/PPC/Ppr.hs index e5147794ce..99f9ab77ea 100644 --- a/compiler/nativeGen/PPC/Ppr.hs +++ b/compiler/nativeGen/PPC/Ppr.hs @@ -718,12 +718,17 @@ pprInstr (SR II32 reg1 reg2 (RIImm (ImmInt i))) | i < 0 || i > 31 = pprInstr (XOR reg1 reg2 (RIReg reg2)) pprInstr (SL II32 reg1 reg2 (RIImm (ImmInt i))) | i < 0 || i > 31 = - -- As aboce for SR, but for left shifts. + -- As above for SR, but for left shifts. -- Fixes ticket http://ghc.haskell.org/trac/ghc/ticket/10870 pprInstr (XOR reg1 reg2 (RIReg reg2)) -pprInstr (SRA II32 reg1 reg2 (RIImm (ImmInt i))) | i < 0 || i > 31 = - pprInstr (XOR reg1 reg2 (RIReg reg2)) +pprInstr (SRA II32 reg1 reg2 (RIImm (ImmInt i))) | i > 31 = + -- PT: I don't know what to do for negative shift amounts: + -- For now just panic. + -- + -- For shift amounts greater than 31 set all bit to the + -- value of the sign bit, this also what sraw does. + pprInstr (SRA II32 reg1 reg2 (RIImm (ImmInt 31))) pprInstr (SL fmt reg1 reg2 ri) = let op = case fmt of -- cgit v1.2.1