From 31e265c1df948d1bcc82d08affe995fd1d1c1438 Mon Sep 17 00:00:00 2001 From: Andreas Schwab Date: Fri, 2 Oct 2020 23:49:01 +0200 Subject: Implement riscv64 LLVM backend This enables a registerised build for the riscv64 architecture. --- hadrian/src/Oracles/Flag.hs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'hadrian') diff --git a/hadrian/src/Oracles/Flag.hs b/hadrian/src/Oracles/Flag.hs index 960036fa89..86521e4aa8 100644 --- a/hadrian/src/Oracles/Flag.hs +++ b/hadrian/src/Oracles/Flag.hs @@ -70,7 +70,7 @@ targetSupportsSMP :: Action Bool targetSupportsSMP = do unreg <- flag GhcUnregisterised armVer <- targetArmVersion - goodArch <- anyTargetArch ["i386", "x86_64", "sparc", "powerpc", "arm", "aarch64", "s390x"] + goodArch <- anyTargetArch ["i386", "x86_64", "sparc", "powerpc", "arm", "aarch64", "s390x", "riscv64"] if -- The THREADED_RTS requires `BaseReg` to be in a register and the -- Unregisterised mode doesn't allow that. | unreg -> return False -- cgit v1.2.1