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| author | Chris Mumford <cmumford@chromium.org> | 2014-12-11 07:58:00 -0800 |
|---|---|---|
| committer | Chris Mumford <cmumford@chromium.org> | 2014-12-11 07:58:00 -0800 |
| commit | c4c38f9c1f3bb405fe22a79c5611438f91208d09 (patch) | |
| tree | 864cfed08d9b6d352a975da2b4200eac56c3f23a | |
| parent | cea9b10e5b8992c2cb8d6ae562bd8c4d2ed3ee69 (diff) | |
| download | leveldb-c4c38f9c1f3bb405fe22a79c5611438f91208d09.tar.gz | |
Add arm64 support to leveldb.
| -rw-r--r-- | port/atomic_pointer.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/port/atomic_pointer.h b/port/atomic_pointer.h index 9bf091f..0f6f05e 100644 --- a/port/atomic_pointer.h +++ b/port/atomic_pointer.h @@ -35,6 +35,8 @@ #define ARCH_CPU_X86_FAMILY 1 #elif defined(__ARMEL__) #define ARCH_CPU_ARM_FAMILY 1 +#elif defined(__aarch64__) +#define ARCH_CPU_ARM64_FAMILY 1 #elif defined(__ppc__) || defined(__powerpc__) || defined(__powerpc64__) #define ARCH_CPU_PPC_FAMILY 1 #endif @@ -92,6 +94,13 @@ inline void MemoryBarrier() { } #define LEVELDB_HAVE_MEMORY_BARRIER +// ARM64 +#elif defined(ARCH_CPU_ARM64_FAMILY) +inline void MemoryBarrier() { + asm volatile("dmb sy" : : : "memory"); +} +#define LEVELDB_HAVE_MEMORY_BARRIER + // PPC #elif defined(ARCH_CPU_PPC_FAMILY) && defined(__GNUC__) inline void MemoryBarrier() { @@ -215,6 +224,7 @@ class AtomicPointer { #undef LEVELDB_HAVE_MEMORY_BARRIER #undef ARCH_CPU_X86_FAMILY #undef ARCH_CPU_ARM_FAMILY +#undef ARCH_CPU_ARM64_FAMILY #undef ARCH_CPU_PPC_FAMILY } // namespace port |