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| author | Ivan Maidanski <ivmai@mail.ru> | 2013-01-13 16:08:12 +0400 |
|---|---|---|
| committer | Ivan Maidanski <ivmai@mail.ru> | 2013-01-13 16:08:12 +0400 |
| commit | c710d1b94cf1c84ba26369fb1e0cf4793303dd4d (patch) | |
| tree | 35ef71a5a98716ff3251c4e42c1e596d068ff4ae | |
| parent | 07ada9bb18fdee939cb7d1add4d5bfa11a6c4d09 (diff) | |
| download | libatomic_ops-c710d1b94cf1c84ba26369fb1e0cf4793303dd4d.tar.gz | |
Fix a typo in comment in msftc/arm.h
* src/atomic_ops/sysdeps/msftc/arm.h: Fix a typo in comment (about
SWP).
| -rw-r--r-- | src/atomic_ops/sysdeps/msftc/arm.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/atomic_ops/sysdeps/msftc/arm.h b/src/atomic_ops/sysdeps/msftc/arm.h index c0195ec..fd6b232 100644 --- a/src/atomic_ops/sysdeps/msftc/arm.h +++ b/src/atomic_ops/sysdeps/msftc/arm.h @@ -80,9 +80,9 @@ AO_store_full(volatile AO_t *addr, AO_t value) #else /* _M_ARM < 6 */ -/* Some slide set, if it has been red correctly, claims that Loads */ +/* Some ARM slide set, if it has been read correctly, claims that Loads */ /* followed by either a Load or a Store are ordered, but nothing */ -/* else is. It appears that SWP is the only simple memory barrier. */ +/* else is. It appears that SWP is the only simple memory barrier. */ #include "../all_atomic_load_store.h" #include "../test_and_set_t_is_ao_t.h" |